On-Chip Cyclic Voltammetry Measurements Using a Compact 1024-Electrode CMOS IC.

Complementary metal-oxide-semiconductor (CMOS) microelectrode arrays integrate amplifier arrays with on-chip electrodes, offering high-throughput platforms for electrochemical sensing with high spatial and temporal resolution. Such devices have been developed for highly parallel constant voltage amperometric detection of transmitter release from multiple cells with single-vesicle resolution. Cyclic voltammetry (CV) is an electrochemical method that applies voltage waveforms, which provides additional information about electrode properties and about the nature of analytes. A 16-channel, 64-electrode-per-channel CMOS integrated circuit (IC) fabricated in a 0.5 μm CMOS process for CV is demonstrated. Each detector consists of only 11 transistors and an integration capacitor with a unit dimension of 0.0015 mm2. The device was postfabricated using Pt as the working electrode material with a shifted electrode design, which makes it possible to redefine the size and the location of working electrodes. The system incorporating cell-sized (8 μm radius) microelectrodes was validated with dopamine injection tests and CV measurements of potassium ferricyanide at a 1 V/s scanning rate. The cyclic voltammograms were in excellent agreement with theoretical predictions. The technology enables rigorous characterization of electrode performance for the application of CMOS microelectrode arrays in low-noise amperometric measurements of quantal transmitter release as well as other biosensing applications.

Introduction

Neurotransmitters are biomolecules stored in secretory vesicles and released to the extracellular environment as messengers in neuronal communication.[1] When a cell such as a neuron or neuroendocrine cell is activated or stimulated, secretory vesicles fuse with the plasma membrane and transmitter molecules are released. This process of vesicle release in packages or quanta is called exocytosis.[2] Dysfunction of synaptic transmission is related to many diseases, such as Parkinson’s disease and Alzheimer’s disease. A better understanding of exocytosis and mechanisms by which certain drugs modulate this process is essential for a mechanistic understanding of therapeutic effects and the development of new types of drugs.

Electrochemistry has been widely used to characterize the exocytotic release of compounds such as dopamine (DA), norepinephrine, epinephrine, and serotonin.[3] In amperometry, a polarizable working electrode is set at a constant voltage with respect to a reference electrode, and neurotransmitters are oxidized upon reaching the electrode. This method provides high sensitivity and high time resolution but does not offer the capability of distinguishing between different electroactive species. On the other hand, CV can distinguish different electroactive species at the cost of reduced temporal resolution.[4] In CV, a voltage ramp is typically applied at the working electrode while positive and negative currents are measured. With the background current subtracted and the resulting current plotted vs the applied ramp voltage as a difference voltammogram, oxidation and reduction peaks provide a unique fingerprint for different species and can be used to identify the measured compounds.[5]

For the study of transmitter release from single cells and individual vesicles, amperometry and CV are conventionally performed with carbon-fiber microelectrodes, recording from a single cell at a time. This laborious procedure requires sequential measurements from many cells and thus is very time-consuming. Complementary metal–oxide–semiconductor integrated circuit (CMOS IC) technology provides the possibility to integrate hundreds or thousands of working electrodes and amplifiers on a single silicon die for parallel recordings from multiple cells. CMOS IC devices specifically optimized for on-chip, high-throughput, single-cell amperometry have been described.[6−10] These devices feature high resolution but can only measure positive current and are not suitable for CV. Incorporating the ability to perform CV on the same chip enables not only the distinction of different analytes but, importantly, also a means for electrode characterization. For CV recordings, bidirectional-current measurements are required. A few bidirectional-current measurement CMOS devices for CV or fast-scan cyclic voltammetry (FSCV) have recently been developed.[10−13] However, they either do not provide sufficient sensitivity for characterizing individual vesicle release events, typically on the order of a few pA, or are not so area efficient in terms of the circuit footprint, a key requirement for large high-throughput arrays. A peripheral cascode bias circuit which is shared by an entire row of electrodes can be used to significantly reduce the number of transistors per detector as compared to a more conventional design[12] while retaining a relatively low gain error.

Another challenge for on-chip CMOS IC electrochemistry detectors is the postfabrication process. As semiconductor foundries do not allow the use of polarizable electrode materials, such as Pt or Au, original electrodes are covered with Al/Cu metal contacts, which are not suitable for electrochemical measurements. A conventional approach is to deposit Pt or Au electrodes directly on Al/Cu metal contacts, but working electrodes may be potentially damaged during multiple uses and expose Al/Cu metal contacts to the test solution, resulting in excessive currents and damage to the chip. A surface-modified structure has been developed to solve this issue and it also offers the possibility to redefine the size and the location of working electrodes.[9]

This work presents a novel high-throughput, high-precision, and area-efficient CMOS circuit with only 11 transistors per detection pixel for CV measurements plus 2 calibration transistors. The pixel dimension was 42 μm × 36 μm and the total area of the 1024 detector array was 1.34 mm × 1.15 mm. The device was postfabricated with a shifted electrode surface-modified structure[9] and validated with dopamine injection and potassium ferricyanide CV measurement.

Experimental Section

Circuit Implementation

Figure shows the schematic diagram of the bidirectional-current potentiostat implemented in this work. The individual detector circuit was modified and improved based on the schematic described in ref (12). In ref (12), to ensure that the current mirror transistors M2 and M3 have the same drain voltage, a second half-shared amplifier was used in the detector circuit with the output connected to VC in Figure .[12] Although this topology provided a near-perfect match for the bias points for M2 and M3, the second half-shared amplifier consumes a large area. To reduce the number of transistors per detector pixel, the second half-shared amplifier was removed from the circuit and replaced by a peripheral cascode bias circuit shared by an entire row of electrodes, thus not consuming individual detector area. The peripheral cascode bias circuit consists of a half-shared amplifier AP, a current source I0, and an NMOS transistor M0. The current source I0 is set to be running at a current level close to the normal operating current of M4 during negative current measurement in CV. With VC connected to the gate of M4, the drain voltages of M2 and M3 are very close and thus a low gain error is achieved.

Figure 1

Schematic diagram of the bidirectional-current potentiostat implemented in this work. The gray color indicates components in a single detector pixel.

Although the original circuit in ref (12) enabled bidirectional-current measurement, both the positive current and the negative current were measured as positive output voltage with the same integration capacitor. Therefore, the output voltage indicated only the absolute value but not the polarity of the input current. In the design presented here, a sign binary output circuit was added to compare two bias points in the circuit indicating if the output current was positive or negative. The sign binary output circuit is implemented with two transistors M6 and M7 (Figure ) added to each detector pixel. When the current is positive, the sign binary output will generate a high voltage. When the current is negative, the sign binary output will be low. The detector pixel also includes 1:1 current mirrors BP and BN, for the calibration of negative current (IP) and positive current (IN), respectively.

With the removal of the second half-shared amplifier and the addition of the sign binary output circuit, the number of transistors reduced by three compared with ref (12) to a total number of 11 transistors per detector pixel for the bidirectional-current potentiostat plus two calibration transistors.

CMOS Sensor Array Fabrication

The CMOS sensor array IC devices were fabricated through MOSIS in the ON Semiconductor C5F/N process. A micrograph of the sensor array is presented in Figure . To improve the area efficiency, the physical layout of the 16-channel, 64-electrode-per-channel sensor array was arranged in 32 × 32 format (Figure ). Each channel was composed of two 32-electrode columns. The 64 electrodes (2 × 32) of a given channel shared one output buffer. The half-shared amplifier A0 and the peripheral cascode bias circuit in Figure were shared by the 32 electrodes in the same row. As original electrodes were covered with Al/Cu metal contacts, postfabrication processes were used to deposit Pt as the polarizable working electrode material. A holder with the exact dimension of the CMOS die was fabricated to mount the CMOS chip inside for better handling. The holder was etched using a deep silicon etcher (Unaxis 770). The chip was bonded to the holder with epoxy (Hardman DOUBLE/BUBBLE Extra Fast Epoxy).

Figure 2

Micrograph of the 1024-electrode bidirectional-current measurement CMOS IC.

For the postfabrication, a modified shifted electrode design based on the method described in ref (9) was used. The chip was spin-coated with LOR 5A (Microchem) at 2000 rpm for 45 s and then soft-baked at 180 °C for 4.5 min. It was then spin-coated with Shipley S1813 at 4000 rpm for 30 s and soft-baked at 90 °C for 1 min. After UV exposure, the chip was baked at 90 °C for 1 min to remove the air bubbles generated during the exposure. Then, the chip was soaked in 726 MIF developer (Microchem) for 1 min 10 s. Descum was performed with YES Asher. A sputtering system (AJA International Inc.) was used for Ti (60 s, 10 nm) and Pt (500 s, 250 nm) deposition using 400 W power. The chip was immersed in Remover PG (Microchem) overnight for metal lift-off. The insulation layer was fabricated by first spin-coating AZ nLOF 2020 (3000 rpm, 30 s) on the CMOS chip followed by a soft-bake at 115 °C for 1 min, resulting in a 2.4 μm thick resist layer. The chip was then aligned with the photomask and exposed with UV (365/405 nm). The postexposure bake was at 115 °C for 1 min. 726 MIF was used to develop the photoresist for 1 min. A final descum was performed with YES Asher. The postfabricated electrodes are shown in Figure . The chip was attached on a side-braze dual in-line package (Addison Engineering, San Jose, CA) and wire bonded. Silicone (RTV 615, GE) was applied to insulate the entire device periphery, exposing only the sensor array area.

Figure 3

Microscope image of the patterned shifted electrode array with microwells. The diameter of the well was 16 μm and depth 2.4 μm.

Testing Solutions

Physiological buffer solution contained (in mM) 140 NaCl, 5 KCl, 1 MgCl2, 10 HEPES/NaOH with pH adjusted to 7.3. DA solution was supplemented with 200 μM DA in the physiological buffer solution. Ferricyanide solutions contained 25/50/75/100 μM potassium ferricyanide in 0.1 M KCl (pH = 3).

Data Acquisition and Analysis

A grounded Ag|AgCl reference electrode was placed in the buffer solution. For the DA injection test, working electrodes on chip were set at +700 mV against the reference electrode. For the ferricyanide CV measurement, the working electrode potential was ramped between +0.6 and −0.1 V with the holding potential at +0.6 V against the reference electrode. The voltage ramp scan rate was 1 V/s.

A customized breadboard was used for the wiring of the power and clock inputs and the device outputs (Figure a). To exchange solutions during the CV measurement, two pipettes were used, one injecting the new solution and one aspirating the currently present solution at the same time (Figure b).

Figure 4

(a) Customized breadboard used for the data acquisition of the CMOS device. (b) Protocol for solution exchange. Two pipettes were used to exchange the solution during the recording, simultaneously injecting the ferricyanide solution and aspirating the currently present KCl solution.

The analogue outputs were connected to a multichannel module NIDAQ PXIe-6368 (National Instruments, Austin, TX) and recorded by a computer using Igor Pro 6 (Wavemetrics). The sampling rates were 2 and 10 kS/s for DA injection tests and for ferricyanide CV measurements, respectively. The higher sampling rate was used for CV to decrease the gain from 10 to 2 mV/pA, increasing the full-scale range to ±1.5 nA. The raw data was demultiplexed by a custom program and filtered with five-point binomial smoothing in Igor Pro 6.

Results

Sign Binary Output Validation

Figure a presents the results from a current injection test feeding a prerecorded CV current (gray solid trace) with known polarity measured with a carbon-fiber microelectrode in 1 μM DA solution through the calibration current mirrors (BP and BN) on the CMOS chip. The sign binary output (Figure a, blue trace) dropped from high to low at the positive–negative transition point. At near-zero current, the sign binary output switched between high and low a few times because at very low current levels the difference between the two bias points used for the sign binary output circuit is too small to accurately generate the sign output. However, this sign uncertainty was limited to a small range very close to zero current levels (±35 pA) (Figure b) and does not affect higher current levels, where the oxidation and reduction peaks are located. It is worth noting that both the positive and the negative current matched very well with the input currents, indicating that the modified negative current measurement path with the peripheral cascode bias circuit has a very low gain error.

Figure 5

(a) Output current was measured while input prerecorded current was injected through the calibration current mirrors (BP and BN). The gray trace indicates the input current. The black trace indicates the output current from the CMOS chip. The blue trace indicates the sign binary output. The black dotted trace indicates the corrected negative current based on the sign binary output. (b) Zoomed-in graph showing the sign uncertainty region. The horizontal scale at the top shows the applied electrode voltage. The sign uncertainty was limited to the current range of ±35 pA, and does not affect current at the oxidation and reduction peaks.

DA Injection Test

Although the CMOS IC in this work was designed and optimized for CV measurements, it can also operate in low-noise constant voltage amperometry mode where only a positive current is present. When a positive current enters through the electrode into the chip, the circuit works the same way as described in refs (7, 8). DA is an electroactive neurotransmitter, which is efficiently oxidized at an electrode set at +700 mV and was injected to validate the CMOS chip.

Twenty microliters of buffer solution was placed on the chip surface with the reference electrode inserted into the buffer. After the recording started, 40 μL of DA solution was added to the device, resulting in a final DA concentration of 133 μM. Figure shows the electrode response of DA injection. Immediately after DA injection, the current detected increased to near saturation of the measurement circuit, and slowly decayed after the maximum point, which is expected in such an experiment. The root-mean-square (RMS) noise of the amperometric recording at 2 kS/s was 217 fA before the addition of DA.

Figure 6

DA injection test with a final DA concentration of 133 μM. Working electrode potential +700 mV.

Ferricyanide CV Measurement

Potassium ferricyanide is commonly used as a test analyte for the characterization of the electrochemical properties of electrodes, such as electrochemical sensitivity, effective electrode area, stability, etc.[14] In potassium ferricyanide CV, a negative scan is first applied at the electrode followed by the positive scan (Figure a, black solid line) because the ferricyanide is originally in its oxidized form. Figure a shows a typical example of the background current for an on-chip working electrode in 0.1 M KCl solution with a scan rate of 1 V/s. The holding potential was set at +0.6 V. A negative scan was first performed from +0.6 to −0.1 V and a positive scan from −0.1 V back to +0.6 V (Figure a, black line).

Figure 7

Measured background current of 0.1 M KCl solution vs electrode potential with a scan rate of 1 V/s. (a) Time course of background current (blue) in response to applied ramp voltage (black). (b) Time course around the point of ramp reversal (box in panel a) on an expanded scale. (c) Circuit simulation of ramp voltage showing the time course of Vref (black line), electrode voltage VE (black dashed line), and output of the half-shared amplifier (A1 in Figure ) VOA (red dashed line). (d) Time course around the point of ramp reversal (box in panel c) on an expanded scale. (e) Superimposed current time courses from three subsequent scans. (f) Cyclic voltammograms plotting currents from panel e against Vref.

During the negative scan, ferricyanide is reduced to ferrocyanideand during the positive scan, ferrocyanide is oxidized back to ferricyanide

Figure a (blue trace) shows the background current for an on-chip working electrode in 0.1 M KCl solution in the absence of ferricyanide with a scan rate of 1 V/s. As expected, the current was negative during the negative slope of the scan and turned positive during the positive slope of the ramp. When the electrode potential returned to the holding potential of +0.6 V at the end of the positive ramp, the current decayed back to zero. However, close inspection of the current around −0.1 V, where the applied ramp slope reverses its sign, revealed a slight delay in the onset of the positive current slope (Figure b). A possible cause of this phenomenon could be that near this point the actual electrode voltage (VE) may differ from the externally applied Vref. To address this question, we performed simulations of the circuit revealing the time course of VE relative to Vref (Figure c,d). As shown in Figure d, the electrode voltage shows an ∼20 ms long plateau starting at the time where the slope of Vref switches from negative to positive. The delayed rise of the current seen in Figure b is therefore explained by the distorted time course of the electrode voltage. The cause of the distortion is the limited slew rate of the output voltage VOA of the half-shared amplifier (A1 in Figure ), as shown in Figure c,d (dashed red lines). To switch the slope of Vref from negative to positive, VOA has to increase by ∼450 mV, which takes ∼20 ms, causing the plateau of the electrode voltage. However, since this distortion of VE is confined to a very narrow range near the slope transition point, the relevant parts of the Faradaic currents will not be affected and the measured reduction and oxidation peaks in difference voltammograms should not be distorted.

The stability of the working electrode is essential for CV measurements. The superimposed three cycles of background currents (Figure e) and resulting cyclic voltammograms (Figure f) show very little variation, indicating that capacitive background currents were stable over the electrode potential range from −0.1 to 0.6 V.

To perform CV measurements with various concentrations of ferricyanide, 25/50/75/100 μM potassium ferricyanide in 0.1 M KCl (pH = 3) solutions were applied. The chip was first loaded with 40 μL of 0.1 M KCl solution without any analytes and the background CV current was recorded for 3 cycles. While the CV recording was continued, the KCl solution was replaced with 40 μL of 25 μM ferricyanide solution using two pipettes, as illustrated in Figure b. The same solution exchange procedure was repeated for 50, 75, and 100 μM potassium ferricyanide solutions. The measured currents shown in Figure a were averaged over 3 cycles for the background current and over 4 cycles for each of the ferricyanide concentrations and plotted as a function of Vref as cyclic difference voltammograms after background subtraction in Figure b. The cyclic voltammograms (Figure b) clearly demonstrate the oxidation and reduction peaks, which occurred at 0.22 and 0.14 V, respectively, consistent with previously reported data.[15]

Figure 8

CV measurement of various concentrations of potassium ferricyanide. (a) Measured background current and CV current with 25/50/75/100 μM potassium ferricyanide with time as the horizontal axis. The applied voltage vs Ag|AgCl reference electrode (black trace) is demonstrated to the right vertical axis. (b) Cyclic difference voltammograms of 25/50/75/100 μM potassium ferricyanide with the background current subtracted.

Figure presents the time course of the reduction peak current amplitude (Figure b) of each cycle during the recording. Each dot represents the currents averaged over 10 ms at the peak position (∼0.138–0.148 V). The blue dots indicate the cycles that were used to generate current averages for the corresponding ferricyanide concentrations in Figure . Upon solution exchange, the first few cycles showed deviating data points due to the mixing of the solutions and mechanical vibrations. Subsequently, peak currents settled to a stable level for the remaining cycles. Figure clearly shows the step increases with increasing concentrations of ferricyanide.

Figure 9

Time course of peak currents during the forward scans of the recording. Each dot indicates the reduction peak current of each cycle. The blue dots indicate cycles that were used to generate the average current for the corresponding ferricyanide concentration in Figure . The horizontal axis indicates the start time of each cycle.

The reduction/oxidation peak values are plotted in Figure (black dots) as a function of ferricyanide concentration together with linear regression lines (black lines). The linear fits were performed with the intercepts fixed at zero. Both oxidation and reduction peaks showed good linearity against concentrations of the analyte.

Figure 10

Reduction (a) and oxidation (b) peak values (black dots) and linear regression lines (black). The red dashed line in (a) shows the theoretical line determined by eq .

Theoretically, the peak current for the forward scan (reduction) described by the Randles–Sevcik equation at 25 °C is[16]where n is the number of electrons transferred in the redox reaction, A is the area of the working electrode, D is the diffusion coefficient, C is the ferricyanide concentration, and ν is the scan rate. With n for potassium ferricyanide equal to 1, the radius of the working electrode equal to 8 μm, D of ferricyanide equal to 7.2 × 10–6 cm2/s, and v at 1 V/s, the dashed red line with a slope of −1.448 pA/μM, is calculated (Figure a). The measured peak current for 100 μM potassium ferricyanide was −135.2 pA, a 6.6% deviation from the theoretically expected value (−144.8 pA). The slope of the linear fit of the reduction peak values (Figure a, black line) was −1.318 ± 0.066 pA/μM, a 9.0% deviation compared to the theoretical value. The small deviation may originate from incomplete solution exchange resulting in slightly reduced actual ferricyanide concentrations or slightly different electrode areas.

One of the advantages of the CMOS-based detector array is that a large number of electrodes can be integrated on one single chip and operated in parallel. Figure shows results from one channel on the chip with 64 electrodes. Five out of 64 electrodes showed a different response (Figure S1) and were therefore not included in this figure. Two of the excluded electrodes showed no response, while the other 3 showed a rather normal reduction peak but a distorted current during the oxidation sweep. These distortions were presumably due to contamination of these three electrodes, which were located adjacent to each other. The overlapped voltammograms in Figure show very close positions and amplitudes of the oxidation and reduction peaks. The oxidation and reduction peak values are (mean ± standard deviation) 127.10 ± 4.03 and 130.28 ± 4.61 pA, respectively.

Figure 11

Superimposed voltammograms for 100 μM potassium ferricyanide for a single channel with 64 electrodes. Five out of 64 electrodes were not giving reasonable results, and are not included in the graph (Figure S1). The black trace indicates the voltammogram for 100 μM potassium ferricyanide in Figure b.

Discussion

In amperometry experiments, it has been observed that different electrode materials exhibit different detection sensitivities. For example, gold electrodes have been found to have higher detection efficiency compared with indium tin oxide (ITO) electrodes.[17] A conducting polymer, PDOT:PSS, used as electrode material shows a 2-fold increment in the quantal size detected than the planar Pt electrode.[18] Cyclic voltammetry (CV) can be used to characterize electrode properties, such as electrochemical sensitivity, effective electrode area, stability, and noise.[14] The CMOS device with CV measurement capability described here is an ideal platform for on-chip electrode characterization as well as amperometric in vitro recording of single vesicle release events from live cells as previously reported.[9] With 1064 working electrodes integrated on one chip, these measurements can be performed with high throughput.

The small distortion of the rapid current change around the transition from negative scan to positive scan (Figure b) is likely due to a distortion of the actual electrode voltage VE. To further reduce the delayed response in Figure b and improve the slew rate of VOA in Figure c,d, the half-shared amplifiers, A0 and A1 in Figure , could be redesigned and improved for better performance. However, this distortion is restricted to a very narrow range around the transition point such that the shapes of difference voltammograms and reduction and oxidation peaks (Figure b) are not affected.

The dependence of reduction peaks on ferricyanide concentration is very close to the theoretically predicted values (Figure ). The average RMS noise for the baseline current with buffer added was 217 fA at 2 kS/s, which is very similar to 200 fA at 2 kS/s RMS noise level for the amperometry version of the chip, which measures only positive currents.[9]

Postfabrication is required to enable electrochemical measurement by CMOS devices as polarizable electrodes are not presented on chip upon delivery. In this work, platinum electrodes were deposited on devices with surface-modified structures to increase the reliability of the chips. Using clean-room technologies, it is also possible to deposit various other materials as working electrodes, such as Au, diamond-like carbon,[17,19] indium tin oxide,[17,20] boron-doped diamond,[21,22] graphitic electrodes embedded in a diamond substrate,[21,23,24] and PEDOT:PSS,[18] to study the electrochemical properties of these materials as working electrodes.

CV measurements were successfully performed on the CMOS sensor array using the ferricyanide/ferrocyanide system, which is generally used as the gold standard for electrode characterization. Calibration measurements using DA suffer from strong adsorption of DA to Pt electrodes, which could only be removed when 0.18 M H2SO4 was added and the electrode potential was scanned at a rate of 100 mV/s between −500 and +975 mV for up to 1 h.[25]

The ferricyanide CV results deviated <10% from the theoretically expected values. Microfluidic devices could be potentially fabricated on the surface of the CMOS chip, enabling more precise measurement, high throughput, and improved reproducibility.[26] A two-layer structure for the microfluidic device was developed,[27] which makes it possible to fabricate the microfluidic devices on surface-modified structures.

CV measurements can also be used to identify faulty electrodes. Five out of 64 electrodes were identified that did not show proper responses (Figure S1) and were excluded from Figure . Variation in the semiconductor fabrication processes or postfabrication processes may result in faulty electrodes that cannot measure current precisely. The capability to perform simultaneous CV characterization of all electrodes in an array allows for the identification of any faulty electrodes such that in subsequent amperometry recordings data from these electrodes will be excluded from the analysis.

For FSCV recordings of quantal release events, the higher scan rate generates much larger currents and the gain of the circuit needs to be reduced. This can be achieved by increasing the size of the integration capacitor. Using the more advanced On Semi C18 (0.18 μm) technology would allow a 10-fold increase of the integration capacitance without significantly increasing the pixel size.

In this work, a CMOS device with bidirectional-current measurement capability has been demonstrated. The compact circuit of each detector pixel consists of only 11 transistors, significantly decreasing the required area for each detector. The sign binary output implemented provides an accurate knowledge of the polarity of the measured current. A dopamine injection test revealed that the chip can be used to detect electroactive species and can potentially be used for single-cell amperometry. A CV experiment with potassium ferricyanide validated the CMOS chip for performing CV measurement and generating voltammograms. The oxidation and reduction peak values showed a linear relationship with analyte concentrations. Five faulty electrodes were identified and excluded from the analysis.