Sihan Chen1, Jangyup Son1, Siyuan Huang1, Kenji Watanabe2, Takashi Taniguchi2, Rashid Bashir1,3, Arend M van der Zande1, William P King1. 1. Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, United States. 2. National Institute for Materials Science, Tsukuba, Ibaraki 305-0044, Japan. 3. Department of Bioengineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, United States.
Abstract
Two-dimensional (2D) materials and heterostructures are promising candidates for nanoelectronics. However, the quality of material interfaces often limits the performance of electronic devices made from atomically thick 2D materials and heterostructures. Atomic force microscopy (AFM) tip-based cleaning is a reliable technique to remove interface contaminants and flatten heterostructures. Here, we demonstrate AFM tip-based cleaning applied to hBN-encapsulated monolayer MoS2 transistors, which results in electrical performance improvements of the devices. To investigate the impact of cleaning on device performance, we compared the characteristics of as-transferred heterostructures and transistors before and after tip-based cleaning using photoluminescence (PL) and electronic measurements. The PL linewidth of monolayer MoS2 decreased from 84 meV before cleaning to 71 meV after cleaning. The extrinsic mobility of monolayer MoS2 field-effect transistors increased from 21 cm2/Vs before cleaning to 38 cm2/Vs after cleaning. Using the results from AFM topography, photoluminescence, and back-gated field-effect measurements, we infer that tip-based cleaning enhances the mobility of hBN-encapsulated monolayer MoS2 by reducing interface disorder. Finally, we fabricate a MoS2 field-effect transistor (FET) from a tip-cleaned heterostructure and achieved a device mobility of 73 cm2/Vs. The results of this work could be used to improve the electrical performance of heterostructure devices and other types of mechanically assembled van der Waals heterostructures.
Two-dimensional (2D) materials and heterostructures are promising candidates for nanoelectronics. However, the quality of material interfaces often limits the performance of electronic devices made from atomically thick 2D materials and heterostructures. Atomic force microscopy (AFM) tip-based cleaning is a reliable technique to remove interface contaminants and flatten heterostructures. Here, we demonstrate AFM tip-based cleaning applied to hBN-encapsulated monolayer MoS2 transistors, which results in electrical performance improvements of the devices. To investigate the impact of cleaning on device performance, we compared the characteristics of as-transferred heterostructures and transistors before and after tip-based cleaning using photoluminescence (PL) and electronic measurements. The PL linewidth of monolayer MoS2 decreased from 84 meV before cleaning to 71 meV after cleaning. The extrinsic mobility of monolayer MoS2 field-effect transistors increased from 21 cm2/Vs before cleaning to 38 cm2/Vs after cleaning. Using the results from AFM topography, photoluminescence, and back-gated field-effect measurements, we infer that tip-based cleaning enhances the mobility of hBN-encapsulated monolayer MoS2 by reducing interface disorder. Finally, we fabricate a MoS2 field-effect transistor (FET) from a tip-cleaned heterostructure and achieved a device mobility of 73 cm2/Vs. The results of this work could be used to improve the electrical performance of heterostructure devices and other types of mechanically assembled van der Waals heterostructures.
The quality of material
interfaces is critical to the performance
of electronic devices and is particularly important for electronic
devices made from two-dimensional (2D) materials. Common interface
disorders that degrade device performance include interface Coulomb
impurities, charge traps,[1−4] and local fluctuations in strain[5,6] and
dielectric screening.[7] Carrier scattering
due to interface impurities is significant, as atomically thick 2D
materials do not have any bulk to screen impurities.[8] Carriers may also scatter at defects that arise from folding
or wrinkling of the 2D material.[9,10]Layers of 2D
materials can be stacked together via van der Waals
forces to create a wide variety of heterostructures that have novel
or improved properties.[11] Clean and smooth
interfaces are essential for the performance of electronic devices
made from heterostructures.[12−14] Mechanical assembly is the most
common way to fabricate van der Waals heterostructures,[11,15] but it often traps contaminants at the interfaces, which limits
the carrier mobility, device performance, reproducibility, and reliability.
Contaminants are trapped at the interfaces as a result of the competition
between the elastic energy of the deformed 2D crystal and the adhesion
energy between the 2D crystal and its substrate.[16−18] These contaminants
come from the ambient environment or are residual materials from the
assembly process.[12,19−21] Some research
studies have been published on the nature of these contaminants,[12,17,22] which include organic residue
at the interfaces of stacked 2D layers.[12,21,23] To minimize interface contamination, it is necessary
to either prevent the contamination from forming during fabrication
or to remove it after fabrication. Strategies to prevent interface
contamination include transferring in inert-gas filled glovebox or
in vacuum,[24,25] as well as minimizing exposure
of 2D materials to polymers and solvents used in transfer, such as
dry pick-up.[19,26,27] Dry pick-up technique uses one layer of the 2D material to pick
up another layer by van der Waals forces, which has enabled the fabrication
of electronic devices with record-high performance and novel properties.[14,26,28−30] However, there
exists substantial variation in electrical performance among the devices
fabricated by pick-up technique,[19,31] which suggests
a need to further improve the quality of the interfaces after assembly.A few cleaning techniques are available to improve the interfaces
of van der Waals heterostructures after assembly. As 2D materials
are impermeable to all gases and liquids,[32−34] chemical and
plasma-based techniques for cleaning the surfaces of 2D materials
are not applicable for cleaning the interfaces.[35−37] Instead, thermal
annealing is often used to reduce interface bubbles and increase the
bubble-free area.[8,12,31,38] At the annealing temperature (typically
200–500 °C), small bubbles become mobile and migrate or
aggregate into large bubbles.[38] Annealing
relies on the random motion of interface bubbles and cannot reliably
remove trapped contaminants from specific interface regions. Decomposition
of contaminants during annealing may also produce radicals that damage
2D materials.[39] Alternatively, mechanical
cleaning techniques, such as atomic force microscopy (AFM) tip-based
cleaning, remove interface contaminants in a controlled fashion without
damaging 2D materials.[21,31,40,41] In tip-based cleaning, an AFM tip squeezes
trapped contaminants out from the interface of the targeted cleaning
area, leaving the interface of the scanned area clean and flat.[40] Tip-based cleaning improved the mobility of
bilayer graphene on hBN by a factor of 60–250%.[42] hBN-encapsulated graphene and few-layer MoS2 devices also showed improvement in their magneto transport
properties after tip-based cleaning.[31] Monolayers
of 2D semiconductors, such as MoS2, WSe2 and
BP, are promising channel materials for nanoelectronics, whose intrinsic
carrier mobilities are however typically limited by extrinsic carrier
scattering sources.[43−46] hBN encapsulation improves device performance of 2D semiconductors
by reducing extrinsic disorders due to surface roughness, charged
impurities, and interface charge traps, as hBN has fewer Coulomb impurities
than SiO2 and high-κ dielectric substrates and is
atomically flat.[38,46,47] There has however been no published research that investigates potential
improvements for hBN-encapsulated 2D semiconductors using tip-based
cleaning and smoothing.This article reports significant improvement
of interface qualities
and electrical performance of hBN-encapsulated monolayer MoS2 by tip-based cleaning. The cleaning process reduced nanometer-scale
height fluctuations by an order of magnitude and reduced the photoluminescence
linewidth of hBN-encapsulated monolayer MoS2 from 84 ±
3 to 71 ± 3 meV, both of which indicate a reduction of interface
disorder. The mobility of four monolayer MoS2 FETs fabricated
on the as-transferred heterostructure increased from an average of
21 ± 2 to 38 ± 6 cm2/Vs after cleaning, demonstrating
that tip-based cleaning is effective in reducing interface disorder
and enhancing the mobility of hBN-encapsulated monolayer MoS2. Finally, we demonstrate the utility of this approach by fabricating
and testing a MoS2 field-effect transistor (FET) fabricated
on a tip-cleaned heterostructure.
Results
Figure shows the
tip-based cleaning of 2D heterostructures. The heterostructure system
consists of monolayer MoS2 encapsulated between monolayer
(1L) hBN on top and multilayer (ML) hBN underneath. Figure a illustrates the concept of
tip-based cleaning. As-transferred 2D heterostructures have surface
and interface contaminants and voids between the 2D layers. The interface
contaminants and voids aggregate into isolated pockets with typical
lateral sizes from a few nanometers up to micrometers.[16,19] In addition to the voids and contaminants shown in Figure , there are also voids and
contaminants between monolayer MoS2 and the multilayer
hBN substrate. By scanning the surface of the stacked 2D layers with
an AFM tip in contact mode, the tip squeezes trapped contaminants
out from the interface of stacked 2D layers and flattens the stacked
2D layers while pushing surface contaminants along the scan direction.
The AFM tip scans in a raster fashion, as in normal contact mode imaging.
Surface and interface contaminants accumulate at the end of each scan
line, leaving the scanned area clean and smooth.
Figure 1
(a) Schematic of tip-based
cleaning of 1L hBN covered 1L MoS2 on a ML hBN substrate.
AFM topography images of hBN-encapsulated
monolayer MoS2 (b) before and (c) after tip-based cleaning.
(d, e) Line scans along the dashed lines in (b) and (c), respectively.
Inset in (d) is the magnified view of the height profile over the
position 0–0.5 μm.
(a) Schematic of tip-based
cleaning of 1L hBN covered 1L MoS2 on a ML hBN substrate.
AFM topography images of hBN-encapsulated
monolayer MoS2 (b) before and (c) after tip-based cleaning.
(d, e) Line scans along the dashed lines in (b) and (c), respectively.
Inset in (d) is the magnified view of the height profile over the
position 0–0.5 μm.We prepared the heterostructure stacks using an established dry
pick-up technique summarized as follows.[19,27] First, we exfoliated hBN and MoS2 flakes onto separate
SiO2 on Si substrates by Scotch tape. We used monolayers
for the top hBN and 8–20 nm thick layers for the bottom hBN.
Atomic force microscopy confirmed the monolayer nature of top hBN.
Second, we picked up top hBN with a polycarbonate (PC) film coated
on a polydimethylsiloxane (PDMS) lens.[48] Third, we sequentially picked up monolayer MoS2 and bottom
hBN by van der Waals forces between MoS2 and hBN. Finally,
we transferred monolayer MoS2 encapsulated by top monolayer
hBN and bottom multilayer hBN to the final 285 nm SiO2 on
the Si substrate. Figures S1, S2, and S3 show additional details of the fabrication. This heterostructure
system has two benefits for studying the interfaces: First, this system
has two interfaces between MoS2 and hBN in the top 1–2
nm of the heterostructure, allowing the AFM to reveal details of interface
inhomogeneity that are largely masked by much thicker top hBN.[31] Second, the top monolayer hBN serves as a tunnel
layer to help inject charge carriers from contact metals into MoS2, allowing direct metal deposition to fabricate electronic
devices, without additional processing steps.[49,50]We performed the tip-based cleaning and measurement experiments
using an Asylum MFP–3D AFM system. For all cleaning experiments,
we used a cleaning force of 70–140 nN, and a scan speed of
up to 28 μm/s. Mechanical cleaning depends strongly on the cleaning
force but weakly on the speed. As long as the cleaning force is optimized,
the scan speed should not significantly affect the cleaning. In general,
AFM tip-based cleaning is limited by its throughput, so a faster scan
is often better. The optimization of the cleaning force will be discussed
later, while the scan speed was limited by the control system of MFP-3D,
which would be greatly increased using a video-rate AFM system.[51] The cleaning tips had a nominal tip radius of
8 nm. The density of scan lines was 5–7 nm/line, smaller than
the tip radius to ensure that contaminants were pushed out of the
cleaned region rather than accumulating between scan lines. After
cleaning, we replaced the cleaning tip with an 8 nm radius tapping
mode tip for imaging, which eliminated the potential for recontaminating
the scanned area. Devices were imaged in tapping mode to minimize
the interaction between the imaging tip and device surface. The imaging
process did not affect the device surface, as repeated imaging of
the same area produced identical AFM images.Figure b–e
shows example results of the heterostructure before and after tip-based
cleaning with a 100 nN cleaning force. Figure b,c shows the topographic maps of the heterostructure
before and after tip-based cleaning, respectively. Figure d,e shows the height profiles
along the dashed lines in Figure b,c, respectively. Figure b,d exhibits height fluctuations in the bubble-free
area of the as-transferred heterostructure. As shown in the inset
of Figure d, the imaged
height fluctuations have a lateral dimension of 50–100 nm and
an amplitude of ∼1 nm. Figure c,e exhibits a much cleaner and smoother topography
of the AFM-cleaned heterostructure, indicating that tip-based cleaning
significantly reduces surface and interface contaminants and flattens
the interfaces. The line scan in Figure e exhibits an average step height of 0.7
nm between monolayer MoS2 and bottom hBN, indicating intimate
contact between MoS2 and hBN where interface impurities
were absent.We next examine the impact of the tip-based cleaning
on the optical
and electronic properties of the monolayer MoS2 by comparing
the photoluminescence and field effect transistor transport with and
without tip-based cleaning.First, Figure compares
the topography and photoluminescence between cleaned and uncleaned
regions of a single heterostructure. For this measurement, we fabricated
a heterostructure consisting of monolayer MoS2 encapsulated
by top monolayer hBN and 8 nm bottom hBN and performed tip-based cleaning
on half of the device to create two regions, cleaned and uncleaned.
This geometry facilitates side-by-side comparison under the same measurement
conditions. We then measured the photoluminescence (PL) on both regions
simultaneously.
Figure 2
(a) AFM image of monolayer MoS2 encapsulated
by top
monolayer hBN and 8 nm thick bottom hBN. The upper half of the heterostructure
was processed by tip-based cleaning, while the lower half was uncleaned.
(b) PL peak width map and (c) characteristic PL spectra with a single-peak
Lorentzian fit (red curves) of hBN-encapsulated monolayer MoS2 shown in (a). (d) Histogram of PL peak width of monolayer
MoS2 in the cleaned and uncleaned regions.
(a) AFM image of monolayer MoS2 encapsulated
by top
monolayer hBN and 8 nm thick bottom hBN. The upper half of the heterostructure
was processed by tip-based cleaning, while the lower half was uncleaned.
(b) PL peak width map and (c) characteristic PL spectra with a single-peak
Lorentzian fit (red curves) of hBN-encapsulated monolayer MoS2 shown in (a). (d) Histogram of PL peak width of monolayer
MoS2 in the cleaned and uncleaned regions.Figure a
shows
the AFM topography of the heterostructure. The uncleaned region had
a root-mean-square roughness Rrms of 2.03
nm, while the cleaned region had a much smaller roughness of 0.41
nm. Figure b–d
shows the PL peak width (full-width-at-half-maximum) map, characteristic
PL spectra, and histogram of PL peak width of monolayer MoS2 in the cleaned and uncleaned regions. Each PL spectrum was fitted
with a Lorentzian peak (red curves in Figure c). Both cleaned and uncleaned regions showed
a single PL peak at 1.863 ± 0.004 eV, corresponding to the A
exciton peak in monolayer MoS2.[52,53] The cleaned region had an average PL peak width of 70.5 ± 2.9
meV, while the uncleaned region had a peak width of 83.7 ± 2.8
meV.The photoluminescence of 2D materials is sensitive to strain,
average
doping, and disorder.[54−57] The peak width is correlated with the disorder within the material,[54,55] while the peak position is sensitive to doping and strain.[56,57] As a result, the photoluminescence maps reveal the impacts of tip-based
cleaning on the electronic properties. First, the cleaned region had
a much smaller PL peak width than the uncleaned region, indicating
that tip-based cleaning reduces disorder in hBN-encapsulated monolayer
MoS2.[55,58] Second, no A trion peak was detected
in either cleaned or uncleaned region, indicating low electron doping
in MoS2 before cleaning and that tip-based cleaning did
not induce electron doping in MoS2.[59] Third, there was no measurable difference in peak positions
between the cleaned and uncleaned regions, indicating that tip-based
cleaning did not significantly change average doping or strain. With
a measurement precision of 4 meV, the induced strain and doping should
be less than 0.08% and 1012 cm–2, respectively.[59−61] Overall, the tip-based cleaning reduces interface disorder and does
not induce average doping or strain.Next, in Figures and 4, we explore the optimal tip-based cleaning
force for the heterostructure, as determined by topography and photoluminescence.
In Figure , we monitor
changes in topography while scanning the same area of the heterostructure
with increasing contact force Fn from
30 to 90 nN. Figure a shows the AFM images recorded by the cleaning tip as it scanned
at each contact force. The surface roughness Rrms values of the heterostructure enclosed by the dashed lines
in Figure a are listed
below each AFM image. Figure b shows corresponding topographical changes along the solid
line in Figure a.
The surface roughness Rrms decreased significantly
when Fn was increased from 30 to 50 nN
and from 50 to 70 nN but decreased only slightly from 70 to 90 nN.
The height profiles in Figure b also show no further topographical changes as Fn was increased from 70 to 90 nN.
Figure 3
Critical cleaning force.
(a) AFM images recorded by the cleaning
tip with increasing contact force Fn from
30 to 90 nN. Surface roughness Rrms of
the region enclosed by the dashed lines in are listed below each AFM
image. (b) Line scans along the solid line in (a) with increasing
contact force.
Figure 4
Determining the optimal cleaning force of the
heterostructure by
photoluminescence. AFM images and corresponding PL peak width maps
of the same heterostructure as-transferred, after tip-based cleaning
at 70 nN, and after additional cleaning at 140 nN. Average PL peak
widths are listed below each PL map. Variations of outlines in PL
maps resulted from misalignment and/or stage shift during measurement.
Critical cleaning force.
(a) AFM images recorded by the cleaning
tip with increasing contact force Fn from
30 to 90 nN. Surface roughness Rrms of
the region enclosed by the dashed lines in are listed below each AFM
image. (b) Line scans along the solid line in (a) with increasing
contact force.Determining the optimal cleaning force of the
heterostructure by
photoluminescence. AFM images and corresponding PL peak width maps
of the same heterostructure as-transferred, after tip-based cleaning
at 70 nN, and after additional cleaning at 140 nN. Average PL peak
widths are listed below each PL map. Variations of outlines in PL
maps resulted from misalignment and/or stage shift during measurement.Figure shows the
AFM topographies and corresponding PL peak width mappings of the same
heterostructure as-transferred, after tip-based cleaning at 70 nN,
and after additional cleaning at 140 nN. On average, the PL peak width
of monolayer MoS2 was 60.6 ± 3.0 meV as-transferred,
56.6 ± 1.7 meV after cleaning at 70 nN, and 57.0 ± 1.1 meV
after cleaning at 140 nN. Since additional cleaning at 140 nN did
not further reduce the PL peak width, 70 nN was sufficient to optimize
the PL of the heterostructure. In summary, the critical cleaning force
for the heterostructure beyond which no improvement in topography
or PL could be detected was around 70 nN.While 70 nN is shown
in this work to be the critical cleaning force
for monolayer MoS2 covered by monolayer hBN, the force
needed to flatten heterostructures with multilayer top hBN remains
debatable. One article reports that the required cleaning force increases
with the thickness of top hBN, and a 2.1 μN force was used to
flatten heterostructures with 18 nm thick top hBN.[40] Another work used a 50–150 nN force to flatten heterostructures
with up to 50 nm thick top hBN.[31] The conflicting
results may be explained by their differences in heterostructure fabrication:
the former work used a water/solvent mixture in fabrication, which
resulted in a few-nanometer-thick liquid contamination layer at the
interfaces, while the latter used dry pick-up technique with minimal
interface contamination. Future research should explore whether the
optimal cleaning force is independent of the thickness of top hBN
when the heterostructure is fabricated using dry pick-up.To
quantify the effects of tip-based cleaning on the electrical
performance of hBN-encapsulated monolayer MoS2, we fabricated
four separate field-effect transistors on an as-transferred heterostructure
and compared their performance as fabricated and after tip-based cleaning. Figure shows these devices. Figure a shows the schematic
of the device structure and electrical measurement. The device consists
of a monolayer MoS2 channel, electrical contacts for the
source and drain consisting of 30 nm gold on 5 nm nickel, a 13 nm
hBN on 285 nm SiO2 gate dielectric, and a degenerately
p-doped silicon back gate. We take advantage of a recently reported
technique, where the top monolayer hBN serves as a tunnel layer to
help inject charge carriers from contact metals into MoS2 and thus reduces contact resistance.[49,50]Figure b,c shows the AFM topographies
of the FETs (Devices A–D) before and after tip-based cleaning,
respectively. Surface roughness Rrms of
the MoS2 channel region decreased from 1.36 to 0.34 nm
after cleaning, excluding trapped bubbles that persisted. Figure d shows the transfer
curves of the FETs before (black) and after (red) tip-based cleaning.
Figure 5
(a) Cross-sectional
view of the FETs, along with the electrical
connections to characterize the devices. AFM topography of the FETs
(b) before and (c) after tip-based cleaning. (d) Transfer curves of
the FETs before (black) and after (red) tip-based cleaning in both
linear and semi-log scale. Vds = 0.1 V.
(e) Extrinsic mobilities of the FETs before and after tip-based cleaning.
(a) Cross-sectional
view of the FETs, along with the electrical
connections to characterize the devices. AFM topography of the FETs
(b) before and (c) after tip-based cleaning. (d) Transfer curves of
the FETs before (black) and after (red) tip-based cleaning in both
linear and semi-log scale. Vds = 0.1 V.
(e) Extrinsic mobilities of the FETs before and after tip-based cleaning.We extracted four performance metrics of the FETs
from the transfer
curves: extrinsic field-effect mobility μ = (L/WCgVds)
(dIds/dVbg), threshold voltage Vth, subthreshold
swing SS, and hysteresis H. We assumed
a gate dielectric capacitance per unit area of 285 nm thick SiO2 in series with 13 nm thick hBN (Cg = 11.6 nF/cm2).[62] The tip-based
cleaning affects mobility, threshold voltage, subthreshold swing,
and hysteresis of the FETs measured in air. As shown in Figure e, the extrinsic mobility of
every FET consistently increased after tip-based cleaning, by 60–93%.
To exclude the effect of contact resistance, we further extracted
the intrinsic mobilities using the Y-function method,[75] as shown in Figure S7. On average,
before tip-based cleaning, the four FETs had an extrinsic mobility
of 21 ± 2 cm2/Vs, an intrinsic mobility of 24 ±
3 cm2/Vs, a threshold voltage of −54.2 ± 4.5
V in forward sweep and −52.6 ± 4.8 V in reverse sweep,
a subthreshold swing of 3.6 ± 1.3 V/dec, and a hysteresis of
1.6 ± 0.9 V. After tip-based cleaning, the FETs had an extrinsic
mobility of 38 ± 6 cm2/Vs, an intrinsic mobility of
46 ± 5 cm2/Vs, a threshold voltage of −35.7
± 1.0 V in forward sweep and −10.7 ± 5.5 V in reverse
sweep, a subthreshold swing of 7.0 ± 1.5 V/dec, and a hysteresis
of 25.1 ± 5.3 V.We ascribe the improvement in mobility
to reduced interface disorder
by tip-based cleaning. Cleaning and flattening of the interfaces reduced
local strain fluctuations, spatial inhomogeneities in dielectric screening,
and interface Coulomb impurities.[4,6,7] As shown in a recent study,[63] the removal of surface contaminants does not improve the electron
mobility of MoS2 likely because ambient adsorbates could
easily readsorb onto the surfaces after tip-based cleaning and still
scatter charge carriers.[64−66] Unexpectedly, threshold voltage,
subthreshold swing, and hysteresis are all increased after tip-based
cleaning. The threshold voltage increased by an average of 18.4 V
in forward sweep and 41.9 V in reverse sweep, the subthreshold swing
nearly doubled, and the hysteresis increased by an average of 23.5
V. Previous reports show that annealing of MoS2 or graphene
on hBN reduces p-type doping, inducing a negative shift in threshold
voltage.[8,13,38] It is peculiar
that the initial hysteresis before cleaning is small since these devices
had only a monolayer of hBN on top, compared with the much thicker
layers of hBN >10 nm typically used in encapsulation.[38,67] We hypothesize that the positive shift in threshold voltage and
the increase in subthreshold swing and hysteresis are all resulted
from increased ambient effects after tip-based cleaning. The initial
surface adsorbates that were cleaned away degraded the mobility but
were relatively immobile. After tip-based cleaning, the effects of
ambient adsorbates increased. Ambient adsorbates served as p-type
dopants and charge traps,[64−66] leading to positive shift in
threshold voltage and increased subthreshold swing and hysteresis
after tip-based cleaning. In general, the increased role of ambient
adsorbates is a tradeoff of using the monolayer top hBN, which had
the advantage of reduced contact resistance[49,50] and enabled easy visualization of the interfaces. For applications,
tip-based cleaning should be combined with thicker top hBN encapsulation.For the device in Figure , we deposited the electrodes before cleaning to enable before
and after comparison of device behavior. However, any residue or interfacial
disorder under the electrodes will still affect contact resistance
and thus limit device performance.[68] To
examine the role of precleaning the interface, we fabricated a FET
in the tip-cleaned region of the heterostructure shown in Figure . Figure shows the transfer curve of
the FET characterized in air in a two-probe configuration in which
a drain-source bias was applied across the outer two leads, leaving
the inner two leads floating. The inset shows the SEM image of the
FET, exhibiting a channel width W of 2.42 μm
and a channel length L of 0.99 μm. The device
achieved an extrinsic electron mobility of 73 cm2/Vs, which
is among the highest reported room-temperature extrinsic two-probe
mobility values for monolayer MoS2 (see Table S1).[14,26,38,50,69−74] We extracted the intrinsic mobility without the effect of contact
resistance using the Y-function method[75] (see Figure S6) and obtained a high intrinsic
electron mobility of 102 cm2/Vs. If we account for the
differences in device geometry and Vds (0.1 V in Figure and 1 V in Figure ), the transfer curve in Figure is not very different from the ones after tip-based
cleaning in Figure . The device in Figure showed higher mobility than the devices in Figure , which likely resulted from lower contact
resistance. However, we cannot rule out the possibility of device-to-device
variations, which is ubiquitous in both exfoliated and synthetic monolayer
MoS2.[71,72,76] Since top monolayer hBN is not sufficiently thick to screen charged
impurities from ambient air,[77] which significantly
limit the electrical performance of monolayer MoS2,[64,65] we expect further improvement in electron mobility after passivation
with thick hBN or high-k dielectrics.[4,69,74,78]
Figure 6
Transfer curve of a FET
fabricated in the tip-cleaned region of
the heterostructure shown in Figure . Vds = 1 V. Inset: SEM
image of the FET.
Transfer curve of a FET
fabricated in the tip-cleaned region of
the heterostructure shown in Figure . Vds = 1 V. Inset: SEM
image of the FET.
Discussion
The
major advantage for AFM tip-based cleaning and smoothing of
the van der Waals heterostructure is that it can be applied to a wide
variety of van der Waals heterostructures assembled by various techniques.
Tip-based learning is purely mechanical and insensitive to the chemistry
of the contaminants and 2D layers. The cleaning procedure could be
used not only for lateral FETs like hBN-encapsulated MoS2 but also for vertical heterojunction transistors,[79−81] which are increasingly
important for high-frequency applications. Other types of van der
Waals heterostructures can also benefit from reduced interface impurities
by tip-based cleaning.[11,41,82] AFM tip-based cleaning also has some limitations. First, it is challenging
to remove bubbles much larger than the AFM tip radius. Thus, this
cleaning technique is more suitable with van der Waals heterostructures
without micron-scale interface impurities. Other techniques such as
thermal annealing[31,38] and micro-dome cleaning[83] can be used to remove microbubbles trapped in
between van der Waals heterostructures. Second, if the top 2D layer
is fragile, the cleaning tip could damage the 2D material before interface
contaminants are removed. Third, this technique is limited by low
throughput (∼6 μm2/min in this work), which
is typical of all scanning probe-based techniques.[84]
Conclusions
We demonstrated reliable cleaning and smoothing
of the interfaces
of hBN-encapsulated monolayer MoS2, by scanning the heterostructure
with an AFM tip in contact mode. The AFM tip-based cleaning reduced
interface disorder as evidenced by reduced height fluctuations of
the heterostructure and reduced photoluminescence linewidth of monolayer
MoS2. The mobility of hBN-encapsulated monolayer MoS2 improved substantially after tip-based cleaning. Combining
the results from AFM topography, photoluminescence, and back-gated
field-effect measurements, we infer that tip-based cleaning enhances
the mobility of hBN-encapsulated monolayer MoS2 by reducing
interface disorder. Finally, we surmise that tip-based cleaning will
also significantly improve the electrical properties of other mechanically
assembled van der Waals heterostructures by cleaning and flattening
their interfaces.
Methods
Fabrication of the Heterostructures
We assembled and
transferred the heterostructures onto SiO2 on Si substrates
using established van der Waals pick-up techniques.[19,27] First, we exfoliated 2D flakes onto separate SiO2 on
Si substrates by Scotch tape. We used 90 nm thick oxide substrates
with hBN exfoliation[85] and 285 nm thick
oxide substrates with MoS2 exfoliation for sufficient optical
contrast to identify number of layers. We used monolayers for top
hBN and 8–20 nm thick layers for bottom hBN. Atomic force microscopy
confirmed the monolayer nature of top hBN (see Figure S3). Second, we prepared a PDMS lens on a glass slide
and coated a layer of the PC film onto the PDMS lens.[48] Then, we fixed the glass slide with PC on PDMS stamp onto
a micromanipulator. Third, we sequentially picked up 1L hBN, 1L MoS2, and ML hBN with the PC film on a PDMS lens at 90 °C.
Fourth, we contacted 1L MoS2 encapsulated by top 1L hBN
and bottom ML hBN with the final 285 nm SiO2 on the Si
substrate at 90 °C and melted the PC film at 170 °C to complete
transfer. Last, we removed the PC film on the heterostructure in a
chloroform bath at room temperature for 24 h.
Tip-Based Cleaning and
Measurements
All tip-based cleaning
and measurement experiments were performed using an Asylum MFP–3D
AFM system. For all cleaning experiments, we used a cleaning force
of 70–140 nN and a scan speed of up to 28 μm/s. The cleaning
tips (RFESP-75, Bruker) had a nominal tip radius of 8 nm and a spring
constant of 3 N/m. The density of scan lines was 5–7 nm/line,
smaller than the tip radius to ensure that contaminants were pushed
out of the cleaned region rather than accumulating between scan lines.
After cleaning, we replaced the cleaning tip with an 8 nm radius tapping
mode tip (HQ:NSC15/AL_BS, MikroMasch) for imaging, which eliminated
the potential for recontaminating the scanned area.
Photoluminescence
Measurements
We performed PL measurements
on a confocal Raman microscope (Nanophoton Raman 11) using a 532 nm
laser with a 100× objective at an excitation power of 0.5 mW
with a grating of 600 L/mm. The lateral resolution of the equipment
was 350 nm. The PL map in Figure had a pixel size of 0.2 μm and an acquisition
time of 0.1 s per pixel. The PL maps in Figure had a pixel size of 0.2 μm and an
acquisition time of 3 s per pixel. Longer acquisition time increased
signal but induced obvious stage drift. We performed all the measurements
at room temperature in ambient laboratory conditions.
Fabrication
of MoS2 Transistors and Electrical Measurement
First, we patterned large contact pads and leads consisting of
30 nm Au on 5 nm Ni onto a 285 nm SiO2 on the degenerately
p-doped silicon substrate using optical lithography. Second, we transferred
the hBN-encapsulated monolayer MoS2 onto prepatterned SiO2 on the Si substrate. Third, we defined the contact electrodes
to MoS2 consisting of 30 nm Au on 5 nm Ni by e-beam lithography
(eLINE, Raith) using a polymethyl methacrylate (PMMA) resist (A4 950k,
Microchem) at an accelerating voltage of 20 kV, a beam current of
30 pA, and a dose of 240 μC/cm2. We performed all
the electrical measurements in air at room temperature using a semiconductor
parameter analyzer (Agilent, 4155C).
Authors: Jeffrey J Schwartz; Hsun-Jen Chuang; Matthew R Rosenberger; Saujan V Sivaram; Kathleen M McCreary; Berend T Jonker; Andrea Centrone Journal: ACS Appl Mater Interfaces Date: 2019-07-02 Impact factor: 9.229
Authors: Thanasis Georgiou; Rashid Jalil; Branson D Belle; Liam Britnell; Roman V Gorbachev; Sergey V Morozov; Yong-Jin Kim; Ali Gholinia; Sarah J Haigh; Oleg Makarovsky; Laurence Eaves; Leonid A Ponomarenko; Andre K Geim; Kostya S Novoselov; Artem Mishchenko Journal: Nat Nanotechnol Date: 2012-12-23 Impact factor: 39.213
Authors: Jesse Crossno; Jing K Shi; Ke Wang; Xiaomeng Liu; Achim Harzheim; Andrew Lucas; Subir Sachdev; Philip Kim; Takashi Taniguchi; Kenji Watanabe; Thomas A Ohki; Kin Chung Fong Journal: Science Date: 2016-02-11 Impact factor: 47.728