Molybdenum disulfide (MoS2) is a promising candidate for the development of high-performance photodetectors, due to its excellent electric and optoelectronic properties. However, most of the reported MoS2 phototransistors have adopted a back-gate field-effect transistor (FET) structure, requiring applied gate bias voltages as high as 70 V, which made it impossible to modulate each detecting device in the fabricated array. In this paper, buried-gate FETs based on CVD-grown monolayer MoS2 were fabricated and their electric and photoelectric properties were also systematically investigated. A photoresponsivity of around 6.86 A/W was obtained at 395 nm, under the conditions of zero gate bias voltage and a light power intensity of 2.57 mW/cm2. By application of a buried-gate voltage of 8 V, the photoresponsivity increased by nearly 10 times. Furthermore, the response speed of the buried-gate MoS2 FET phototransistors is measured to be around 350 ms. These results pave the way for MoS2 photodetectors in practical applications.
Molybdenum disulfide (MoS2) is a promising candidate for the development of high-performance photodetectors, due to its excellent electric and optoelectronic properties. However, most of the reported MoS2 phototransistors have adopted a back-gate field-effect transistor (FET) structure, requiring applied gate bias voltages as high as 70 V, which made it impossible to modulate each detecting device in the fabricated array. In this paper, buried-gate FETs based on CVD-grown monolayer MoS2 were fabricated and their electric and photoelectric properties were also systematically investigated. A photoresponsivity of around 6.86 A/W was obtained at 395 nm, under the conditions of zero gate bias voltage and a light power intensity of 2.57 mW/cm2. By application of a buried-gate voltage of 8 V, the photoresponsivity increased by nearly 10 times. Furthermore, the response speed of the buried-gate MoS2 FET phototransistors is measured to be around 350 ms. These results pave the way for MoS2 photodetectors in practical applications.
Since the discovery of
graphene, two-dimensional (2D) materials
have been considered to be promising candidates for applications in
next-generation optoelectronic devices due to their high carrier mobility,[1] broad coverage of their adjustable band gaps,[2] strong interaction between light and matter,[3] and high flexibility.[4,5] Among
these, photodetectors based on graphene and MoS2 have been
intensely studied. Due to their extremely high carrier mobility, graphene
photodetectors always show a high photoresponse speed.[6−8] However, graphene’s zero-band-gap structure limits the photocurrent
generation within the interface region between graphene and the metal
electrode.[9,10] Thus, the photocurrents and photoresponsivities
of graphene photodetectors are both very small. In contrast, monolayer
MoS2 not only has a direct band gap (1.8 eV)[11,12] but also exhibits a higher light absorption rate (11%). Furthermore,
MoS2 is less vulnerable to environmental changes, whose
robustness to harsh vacuum and solution processes enables the tuning
of its optoelectronic properties.[13] Therefore,
MoS2 has recently attracted more and more research attention
in high-performance photodetectors.[7,14]Since
the first monolayer MoS2 photodetector was demonstrated
with a photoresponsivity of 7.5 mA/W and a response speed of 50 ms,[15] various MoS2 photodetectors have
been studied and reported. Kis et al. demonstrated a photodetector
based on an exfoliated monolayer MoS2 membrane, which realized
an extremely high photoresponsivity of 880 A/W (at 561 nm) and a response
speed (rise time) of 4 s by improvement of the mobility, contact quality,
and positioning technique.[16] Through insertion
of a very thin TiO2 layer into the interface between the
exfoliated MoS2 membrane and metal electrodes to optimize
the interfacial contact, Roqan et al. demonstrated a MoS2 photodetector with an increase in photoresponsivity from 3 to 9
A/W (at 450 nm) and a reduction of the response speed from 5 s to
less than 1 s.[13] Hu et al. improved the
photoresponsivity of a monolayer MoS2 photodetector from
16.9 to 377 A/W (at 360 nm) and reduced the response speed from 31
to 7.5 s by combining CVD-grown MoS2 with carbon quantum
dots.[17] Recently, Zhang et al. increased
the photoresponsivity of few-layer MoS2 photodetectors
from 13.46 to 26 A/W (at 660 nm) and obtained a photoresponse speed
of about several seconds, by integrating gold nanoellipse arrays on
a few-layer MoS2 nanosheet.[18] It is worth noting that all of the above MoS2 photodetectors
employed a back-gate field-effect transistor (FET) structure, which
required very high gate voltages of up to 70 V.[16,19−21] The high gate voltages limit their practical applications
in low-voltage and energy-saving areas. The back-gate FET structure
also makes it impossible to independently modulate each device in
an array, which is not conducive to applications in sensing and imaging
arrays.In this paper, monolayer MoS2 FETs with a
buried-gate
structure were fabricated and demonstrated and their electric and
photoelectric properties were systematically investigated. Under the
condition of zero gate bias voltage, a photoresponsivity as high as
6.86 A/W was obtained. By application of a voltage as low as 8 V to
the buried-gate electrode, the photoresponsivity can be enhanced 10
times. Furthermore, the photoresponse speed was about 350 ms. These
results indicate that the buried-gate MoS2 FET photodetectors
have superb combination properties.
Experimental
Section
The monolayer MoS2 membranes were grown
by the chemical
vapor deposition (CVD) method, purchased from ACS Material, LLC. First,
a 200 nm thick silicon nitride (SiNx) passivation layer
was deposited on a highly doped p-type silicon substrate. Then, a
chromium (Cr)/gold (Au) electrode was sputtered on the SiNx layer, acting as the buried-gate electrode, where the thicknesses
of Cr and Au layers were 10 and 30 nm, respectively. After that, a
silicon dioxide (SiO2) dielectric layer with a thickness
of 30 nm was deposited on top of the buried-gate electrode. Next,
the monolayer MoS2 membrane was transferred onto the SiO2 dielectric layer and patterned. Subsequently, Cr/Au (10 nm/50
nm) source and drain electrodes were evaporated on the MoS2 layer, and finally, MoS2 FETs with a buried-gate structure
were obtained. Detailed information about the fabrication processes
can be found in our previous work.[14]The fabricated buried-gate MoS2 FETs were measured using
an environmental scanning electron microscope (FEI Quanta 200 ESEM
FEG) operating at a beam voltage of 15 kV in high-vacuum mode. Raman
spectroscopy (LabRam HR-800, Horiba Jobin Yvon) was carried out in
the conductive channel of the FET to confirm the existence of MoS2 and determine its layer number. The electrical properties
of the devices were characterized by using a probe station (Summit
12000, Cascade Microtechnology) and a semiconductor parameter analyzer
(B1500A, Keysight). By integration of a light-emitting diode (LED)
light-curing system (CEL-LEDS35) into the electric testing system,
the photoelectrical properties of the buried-gate MoS2 FETs
were systematically investigated. Unless stated otherwise, all of
the electric and photoelectric experiments were performed at room
temperature and under ambient conditions.
Results
and Discussion
Figure A shows
the schematic structure of the buried-gate MoS2 FET. An
SEM image of the three parallel devices fabricated on the same SiN passivation layer is shown in Figure C. The dimensions of the MoS2 conductive channel are 30 μm × 400 μm, while
those of the contact pad are 100 μm × 100 μm. An
enlarged SEM image of one of the buried-gate MoS2 FETs
shown in Figure D
demonstrates that the device was well constructed. It can be obviously
seen that the gate electrode is located in the middle of the MoS2 conductive channel. The widths of the source, drain, and
gate electrodes are all 10 μm. In comparison with a top-gate
FET structure, this structure enables the MoS2 conductive
channel to absorb more incident light. The existence of the MoS2 membrane and its layer number were verified and determined
by Raman measurements, as shown in Figure B. Two peaks are seen in the figure, representing
E2g1 and A1g peaks. The E2g1 peak is related to the in-plane vibration of two S atoms
and one Mo atom inside the MoS2,[22,23] which is observed at around 384.8 cm–1. However,
the A1g peak results from the out-of-plane vibration of
only S atoms in inverse directions,[24,25] located at
about 403.8 cm–1. The energy difference between
the E2g1 and
A1g Raman modes is 19 cm–1. These results
agreed well with observations of the previously reported monolayer
MoS2 devices[17,24−26] and verified the existence of a monolayer MoS2 membrane.
Figure 1
Structure
characterization and Raman spectroscopy of the buried-gate
MoS2FETs. (A) Schematic of the buried-gate MoS2 FET. (B) Raman spectrum for the conductive channel of the MoS2 FET. (C) SEM image of three parallel fabricated buried-gate
MoS2 FETs. (D) Enlarged SEM image of the MoS2 conductive channel.
Structure
characterization and Raman spectroscopy of the buried-gate
MoS2FETs. (A) Schematic of the buried-gate MoS2 FET. (B) Raman spectrum for the conductive channel of the MoS2 FET. (C) SEM image of three parallel fabricated buried-gate
MoS2 FETs. (D) Enlarged SEM image of the MoS2 conductive channel.Figure A shows
the transfer characteristics of the buried-gate MoS2 FET,
where the source-drain current (Ids) turns
on at a gate voltage (Vgs) of 2.5 V. Hence,
a typical n-type enhancement mode behavior is clearly seen. Ids increases significantly with an increase
in Vgs above the threshold voltage, exhibiting
an on/off ratio of over 105. Figure B shows the output characteristics of the
buried-gate MoS2 FET, with Vgs varying from −2 to 6 V. When Vgs is higher than 3 V, the current increases significantly as Vds increases. It is noted that Ids increases nonlinearly due to the unordered defective
interface between the MoS2 membrane and the metal electrodes.
The linearity could be improved by inserting a very thin TiO2 interlayer into the interface.[13] It can
be seen that, under a certain Vds, Ids increases with an increase in Vgs, indicating a good gate-control ability.
Figure 2
Electrical
properties of the buried-gate MoS2FET. (A)
Transfer characteristics of the device at a source-drain voltage (Vds) of 1 V. (B) Output characteristics of the
device.
Electrical
properties of the buried-gate MoS2FET. (A)
Transfer characteristics of the device at a source-drain voltage (Vds) of 1 V. (B) Output characteristics of the
device.The photoelectrical characterization
of the buried-gate MoS2 FET was carried out by using the
experimental setup shown
in Figure A. A LED
with a wavelength of 395 nm illuminated the FET. A semiconductor parameter
analyzer was used to supply the source-drain and gate bias voltages
and measure the Ids values of the device. Figure B,C shows the temporal
photoresponses of the FET under different incident light power densities
and source-drain voltages (Vds), where
the full power density is 219.1 mW/cm2. It can be seen
from both graphs that, when the light is switched on, Ids increases immediately and significantly and gradually
reaches a saturation state. When the light is switched off, Ids decreases promptly and markedly and then
gradually returns to its original level. These behaviors were also
observed in other reported back-gate MoS2 FET photodetectors
and could be ascribed to a photoconductive effect (or a photovoltaic
effect).[24,27−29] The photocurrent (Iph) is defined as Iph = Ion – Ioff, where Ion and Ioff are the values of Ids when
the light is on and off, respectively. Furthermore, it can be seen
that Iph increases when the incident light
power intensity increases from 2.57 to 219.06 mW/cm2. Under
the conditions of maximum incident light power intensity, zero gate
bias voltage, and 1 V source-drain voltage, the value of Iph reached 10.56 μA (as shown in Figure B), which is 3500 times higher
than that of a reported back-gate monolayer MoS2 FET (3
nA at 580 nm, Vds = 1 V, Vgs = −7 V, 0.1 mW/cm2).[26] This value is also significantly higher than that in the
previous work of our group (0.87 μA at 395 nm, Vds = 1 V, Vgs = 0 V, 219.06
mW/cm2).[31] This phenomenon may
be due to the fact that the electrode could not only collect the photogenerated
carriers between the channels but also collect the photogenerated
carriers on the other side. Excess photoinduced carriers cause an
increase in the free carrier concentration, leading to further reduced
resistance of the MoS2.[7] When Vds is increased to 8 V, Iph is increased to 101.86 μA (as shown in Figure C), which is 10 times higher
than that at Vds = 1 V. It is also observed
that Ion fluctuates significantly as the
light power intensity increases, especially when Vds is high.
Figure 3
Temporal photoresponse of the buried-gate MoS2 FET photodetector
under the illumination of different light power densities and source-drain
voltages. (A) Schematic of the experimental setup with LED illuminaiton.
(B, C) Temporal photoresponses of the FET under various incident light
power intensity, at source-drain voltages of 1 and 8 V, respectively.
The LED light was switched on and off periodically, and the gate voltage
was set to zero.
Temporal photoresponse of the buried-gate MoS2 FET photodetector
under the illumination of different light power densities and source-drain
voltages. (A) Schematic of the experimental setup with LED illuminaiton.
(B, C) Temporal photoresponses of the FET under various incident light
power intensity, at source-drain voltages of 1 and 8 V, respectively.
The LED light was switched on and off periodically, and the gate voltage
was set to zero.In order to comprehensively
characterize the photodetection performance
of the buried-gate MoS2 FET photodetectors, the photoresponsivity
(R) and detectivity (D*) are evaluated
in Figure . The photoresponsivity
is defined as R = Iph/(PS), where P is the light power
intensity and S is the area of the MoS2 conductive channel. Hence, R decreases as the power
intensity increases, as indicated in Figure A, due to the photogating effect, and can
be ascribed to the saturated absorption under high light power.[30] Moreover, it is clearly seen that at Vds = 8 V the values of R are
significantly higher than those at Vds = 1 V. A photoresponsivity value as high as 6.86 A/W is obtained,
under the conditions of zero gate bias voltage, Vds = 8 V, and P = 2.57 mW/cm2, which is higher than those of most of the recently reported MoS2 photodetectors without integration or combination with additional
light harvesters.[13,15,34] The detectivity D* is expressed as D* = RS1/2/(2eIoff)1/2, where e is the electron charge with a value of 1.6 × 10–19 C. From Figure A, the value of D* is calculated to
be 0.72 × 1012 jones, which is also superior to those
of most of the MoS2 photodetectors given in Table .
Figure 4
Photoresponsivity and
speed of the buried-gate MoS2 FET
photodetector. (A) The light power intensity dependent photoresponsivity
of the device under different source-drain voltages. (B) Rise (tr) and decay times (tf) of the photocurrent at Vds = 1 V and Vgs = 0 V.
Table 1
Photoelectrical Characteristics of
Typical Photodetectors Based on MoS2
description
wavelength
(nm)
responsivity
detectivity (jones)
rise
time (s)
ref
single-layer MoS2 phototransistor
550
7.5 mA/W (80 μW)
0.05
(15)
monolayer MoS2 photodetector
561
880 A/W (150 pW) @ 8 V
4
(16)
pristine MoS2 photodetector
360
16.9 A/W @ 5 V
2.3 × 1012
31
(17)
dye-sensitized MoS2 photodetector
520
1.17 A/W (1 μW) @ 5 V
1.5 × 107
5.1 × 10–6
(33)
large-scale two-dimensional MoS2 photodetector
850
1.8 A/W @ 5 V
∼5 × 108
0.3
(34)
flowerlike MoS2 flexible broad-band photodetector
405
0.963 A/W @ 1 V
2.9 × 1010
9.33
(35)
MoS2/PGS photodetector
460
0.25 A/W (1.373 μW) @ 20 V
5.6 × 108
2.19
(36)
photodetector based on CVD-grown
2D MoS2
405
0.2907 A/W
1014.84
0.0778
(37)
this work
395
6.86 A/W @ 8 V
0.72 × 1012
0.35
Photoresponsivity and
speed of the buried-gate MoS2 FET
photodetector. (A) The light power intensity dependent photoresponsivity
of the device under different source-drain voltages. (B) Rise (tr) and decay times (tf) of the photocurrent at Vds = 1 V and Vgs = 0 V.Photoresponse speed
is another important feature for a photodetector. Figure B shows a complete
on/off cycle in which the photocurrent exhibits rise/decay and reaches
a steady saturation between. The rise time (tr) and decay time (td) follow the
definitions used in the MoS2 photodetectors reported by
Roqan et al.,[13] where they are defined
as the times required to reach 70% and to attenuate to 50% of the
peak current, respectively. The tr and td values of the buried-gate MoS2 photodetectors
are 350 and 370 ms, respectively, which are relatively faster than
those of recently reported MoS2 photodetectors with photoresponsivities
of more than 1 A/W.[13−15] What is more, a 2D alloying strategy could be used
to improve the photoresponse of the MoS2 device.[32] A comparison of the performance of the buried-gate
MoS2 photodetectors with those of other reported MoS2 photodetectors is shown in Table . It can be seen that the comprehensive performance
of our devices is rather good.Systematic measurements demonstrated
that the normalized photoresponsivity
of the buried-gate MoS2 photodetector increases approximately
linearly with an increase in the source-drain voltage (Vds), as shown in Figure A, due to an increase in the carrier drift velocity.
In contrast, the carrier transit time Tt (defined as Tt = l2/μVds, where l is the device length, μ is the carrier mobility, and Vds is the bias voltage) decreases as Vds increases.[15,38] The photoresponsvity
can also be enhanced by applying a proper gate bias voltage (Vgs), as shown in Figure B. Due to the buried-gate structure, a small Vgs value as low as 8 V can enhance the photoresponsivity
by nearly 10 times at Vds = 1 V, in comparison
to that at Vgs = 0 V. On consideration
that at Vgs = 0 V the photoresponsvity
of the buried gate MoS2 photodetector could reach 6.86
A/W (Figure A), the
maximum photoresponsivity of the device could be very high. Most of
the reported MoS2 photodetectors adopt a back-gate structure,
which always require much higher gate voltages of more than 50 V.
For example, the ultrasensitive monolayer MoS2 photodetectors
demonstrated by Kis et al. required a back-gate voltage of ∼70
V.[16] Therefore, the buried-gate MoS2 photodetectors proposed in this paper have a promising potential
for use in low-voltage and energy-saving photoelectric fields.
Figure 5
Normalized
responsivities of the buried-gate MoS2 FET
photodetector as functions of source-drain and gate voltages. (A)
Source-drain-voltage-dependent normalized photoresponsivity, where R0 is the value of R at Vgs = 0 V. (B) Gate-voltage-dependent photoresponsivity
at Vds = 1 V.
Normalized
responsivities of the buried-gate MoS2 FET
photodetector as functions of source-drain and gate voltages. (A)
Source-drain-voltage-dependent normalized photoresponsivity, where R0 is the value of R at Vgs = 0 V. (B) Gate-voltage-dependent photoresponsivity
at Vds = 1 V.
Conclusion
Sensitive buried-gate FET photodetectors
based on CVD-grown monolayer
MoS2 were fabricated and demonstrated. A high photoresponsivity
of 6.86 A/W was obtained under zero gate bias voltage, on illumination
by a LED light with a wavelength of 395 nm and a power intensity of
2.57 mW/cm2. The photoresponsivity could be enhanced nearly
10 times by applying an 8 V voltage to the buried-gate electrode.
Furthermore, the response speed of the buried-gate MoS2 FET phototransistors is about 350 ms. This study offers a simple
way to obtain high-performance and low-power MoS2-based
photodetector arrays.
Authors: Kin Fai Mak; Keliang He; Changgu Lee; Gwan Hyoung Lee; James Hone; Tony F Heinz; Jie Shan Journal: Nat Mater Date: 2012-12-02 Impact factor: 43.841