Literature DB >> 28937619

An Al₂O₃ Gating Substrate for the Greater Performance of Field Effect Transistors Based on Two-Dimensional Materials.

Hang Yang1, Shiqiao Qin2, Xiaoming Zheng3,4, Guang Wang5, Yuan Tan6, Gang Peng7, Xueao Zhang8.   

Abstract

We fabricated 70 nm Al₂O₃ gated field effect transistors based on two-dimensional (2D) materials and characterized their optical and electrical properties. Studies show that the optical contrast of monolayer graphene on an Al₂O₃/Si substrate is superior to that on a traditional 300 nm SiO₂/Si substrate (2.4 times). Significantly, the transconductance of monolayer graphene transistors on the Al₂O₃/Si substrate shows an approximately 10-fold increase, due to a smaller dielectric thickness and a higher dielectric constant. Furthermore, this substrate is also suitable for other 2D materials, such as WS₂, and can enhance the transconductance remarkably by 61.3 times. These results demonstrate a new and ideal substrate for the fabrication of 2D materials-based electronic logic devices.

Entities:  

Keywords:  Al2O3 gating substrate; WS2; field effect transistors; graphene

Year:  2017        PMID: 28937619      PMCID: PMC5666451          DOI: 10.3390/nano7100286

Source DB:  PubMed          Journal:  Nanomaterials (Basel)        ISSN: 2079-4991            Impact factor:   5.076


1. Introduction

Two-dimensional (2D) materials, such as graphene and transition-metal dischalcogenides (TMDs), have attracted tremendous interest for possible applications in transistors [1,2,3,4], photodetectors [5,6], and touch panels [7,8] owing to their extraordinary properties. However, most efforts to date employ a 300 nm thick silicon dioxide (SiO2) substrate as the gate dielectric layer. This substrate is widely used is mainly because 2D materials can be readily visualized using an optical microscope due to optical interference [9,10,11]. Although they have led to many interesting scientific discoveries [12,13,14], applying 300 nm SiO2 substrates will greatly reduce the performance of the devices, especially the signal amplification capability, which is one of the most important parameters of contemporary integrated circuits [15,16]. The devices fabricated on SiO2/Si substrates lack enough capability to regulate the Fermi surface of samples, thus requiring higher back-gate voltage [15]. Generally, the top-gate structure is adopted to enhance the gate capacitance of field effect transistors (FETs). However, its fabrication is challenging, as 2D materials lack dangling bonds [17,18]. Although many alternate approaches have been demonstrated, they inevitably result in the degradation of carrier mobility [19,20]. Previously, Liao et al. firstly reported that applying 72 nm Al2O3/Si substrates could improve the optical contrast and electrical properties of single-graphene FETs [21]. However, the Al2O3 film they fabricated was not well insulated since they directly attached tape onto the Al2O3/Si substrate using mechanical exfoliation [6]. This conventional method may damage Al2O3 films due to the strong adhesive force of the tape [21]. In our experiments, the deterministic transfer method was applied to transfer graphene onto an Al2O3/Si substrate to avoid this problem. In addition, the corrosion time of the HF solution was carefully controlled so that the wafer would be smoother, which was beneficial for forming a dense Al2O3 film via atomic layer deposition (ALD) growth. Accordingly, our single-layer graphene FETs, compared to those of Liao’s work, achieved a greater performance. Furthermore, we systematically investigated WS2 FETs on an Al2O3 gating substrate, showing that this superior substrate is also suitable for other 2D materials.

2. Experimental Details

Figure 1 illustrates the fabrication process of graphene- (or WS2)-based FETs on Al2O3/Si substrates. Firstly, an Al2O3 film was deposited on silicon (doped n++, conductivity: 0.01–0.02 Ω·cm) wafers via the ALD technique using tri-methyl-aluminum ((CH3)3Al) and distilled water as the source (reaction temperature: 250 °C). Prior to the deposition of Al2O3, a native SiO2 layer was removed with a 5% (mole ratio) hydrofluoric acid (HF) solution (40 min). After the Al2O3 film was deposited, graphene (or WS2) was transferred onto that substrate via the deterministic transfer method [22] (see Figure S1). At last, the source and drain contacts were patterned using e-beam lithography (EHT: 10 kV, aperture size: 30 m, beam current: 217.1 pA), and 10 nm Ti/50 nm Au were deposited using e-beam evaporation (vacuum: 1 10−5 Pa, evaporation rate: Ti: 0.5 Å/s; Au: 1.5 Å/s).
Figure 1

The process of fabricating graphene (or WS2) field effect transistors (FETs) on Al2O3/Si substrates. HF: hydrofluoric acid.

The topography of the samples was characterized via atomic force microscopy (AFM, NT-MDT company, Moscow, Russia, scanning mode: Semi-contact, scanning frequency: 1.01 (Hz), scanning electron microscopy (SEM, Raith company, Dortmund, Germany) and optical microscopy (Nikon company, Tokyo, Japan). The Raman and contrast spectra were recorded with Confocal Raman Spectrometer (WiTec company, Ulm, Germany, exciting laser wavelength: 532 nm, spot size: 2 m). The thickness of the Al2O3 film was obtained with GES-5 ellipsometer (Sopra Company, Annecy, France) and calculated to be approximately 70 nm. All characterizations were conducted in ambient conditions and at room temperature (300 K). The electrical properties were measured with 4200-SCS probe system (Keithley Company, Cleveland, OH, USA).

3. Results and Discussion

As shown in Figure 2a, the Al2O3 film is uniform over a large area (50 m 50 m). Figure 2b illustrates the height distribution of the local area, which mainly varies from 4 to 6 nm. The parameters of surface roughness are given in Table S1. Based on the measurements, the Si surface is extremely smooth after HF treatment. In addition, the average surface roughness of the ALD-grown Al2O3 film is 1.26 nm.
Figure 2

Characterization of 70 nm Al2O3 film prepared by atomic layer deposition (ALD). (a) Atomic force microscopy (AFM) image and corresponding (b) height distribution of film surface (areas in blue dashed box). (c) Tunneling currents of Al2O3 and SiO2 films. (d) Flow–Nordheim (F–N) fitting curve of the metal-insulator-semiconductor (MIS) device.

To understand the dielectric properties of the Al2O3 film, I-V characteristics were firstly measured based on metal-insulator-semiconductor (MIS) devices with Al2O3 and SiO2 insulating layers on silicon wafers (shown in Figure 2c). When bias voltage increased to 10 V, the tunneling current of Al2O3 was only one tenth of that of SiO2. This indicates that the Al2O3 dielectric layer can withstand a higher gate voltage, resulting in greater modulation of the Fermi level of 2D materials. In general, the I-V characteristic of the dielectric layer can be described via Fowler–Nordheim (F–N) tunneling behavior [21,23]: where J is current density, E is the electric field, and A and B are constants considering carrier effective mass and barrier height, respectively. Apparently, based on Figure 2d, when the electric field is large, it is in good agreement with the theoretical model [24]. However, in the case of small electric fields, due to the influence of electrical noise in the environment, the experimental curve exhibits fluctuation [19]. Optical contrast is the difference in visual properties that enables us to distinguish an object from other objects and the background. Figure 3a,b shows the optical image of graphene on SiO2/Si and Al2O3/Si substrates, respectively. To quantify the contrast of graphene on different substrates, the color images are converted to gray-scale images. By calculation [25], the absolute value of contrast intensity of graphene on the Al2O3/Si substrate (−0.12) is significantly higher than that on the SiO2/Si substrate (−0.05). Furthermore, from the contrast spectrum shown in Figure 3c, the absolute value of the contrast on the Al2O3/Si substrate in the 450~700 nm wavelength range is always higher than that on the SiO2/Si substrate. The best contrast of graphene on the Al2O3/Si substrate could be obtained with 450 nm and 550 nm illuminations. As depicted in Figure 3d, the G peak and the 2D peak of graphene on the Al2O3/Si substrate experience a red-shift (8.3 cm−1 for G peak and 3.3 cm−1 for 2D peak). The Raman shift could be simplified with the harmonic oscillator model [26]: , where is the Raman shift, is the mechanical constant, and m is the effective mass. Because of the presence of spotted islands on the Al2O3/Si substrate, a tensile stress is formed onto graphene, which leads to a decrease in and subsequently the red-shift of the Raman vibration peak of graphene on the Al2O3/Si substrate [26].
Figure 3

(a,b) Optical image of graphene on the SiO2/Si and Al2O3/Si substrates. (c) The contrast and (d) Raman spectra of graphene on SiO2/Si and Al2O3/Si substrates. Raw data and processing methods are shown in Figures S2 and S3.

Next, the electrical properties of graphene FETs on the Al2O3/Si substrate were studied in nitrogen. As depicted in Figure 4a, the drain-source current (I) increases linearly in pace with the bias voltage, indicating good ohmic contact between the graphene and the electrode. The aspect ratio (L/W) of the channel is approximately 1.5, as shown in the SEM image. For better comparison among different samples, normalized I (=I ) was applied, which considered the influence of the aspect ratio. Figure 4b shows the transfer characteristics of our devices (V means back-gate voltage). It is obvious that the curve slope of the device on the Al2O3/Si substrate is significantly higher than that on the SiO2/Si substrate, indicating a greater gate regulation ability of the 70 nm Al2O3 dielectric layer. In addition, for graphene on the Al2O3/Si substrate, when the gate voltage increases from −5 to 3.6 V, the current decreases from 190 to 28.3 A, so the unit on/off ratio is evaluated to be 0.78 V−1. However, the unit on/off ratio for graphene on the SiO2/Si substrate reaches only 0.09 V−1. Accordingly, the magnification capability was easily estimated to increase by 8.7 times. The minimum conductance on the Al2O3/Si substrate is slightly higher than that on the SiO2/Si substrate, which may be due to induced impurities in the transfer process, leading to more carriers in grapheme [8]. For further discussion, some significant parameters of FETs are listed in Table 1.
Figure 4

(a) Output characteristics of graphene FETs on the Al2O3/Si substrate at different gate voltages (−5~10 V). The inset shows an SEM image of the device. (b) Transfer characteristics of graphene FETs on different substrates.

Table 1

Significant parameters of graphene FETs on different substrates.

ParametersMinimum ConductivityDirac PointMaximum TrascondutanceMobility
Substrate
Al2O3283 μS3.6 V−26.1 μS6500 cm2 V−1·s−1
SiO2237 μS18.7 V2.6 μS6780 cm2 V−1·s−1
The normalized transconductance g can be extracted from the following [27]: The black curve in Figure 5a illustrates the transconductance variation of graphene on the Al2O3/Si substrate. It can be seen that the maximum negative transconductance and maximum positive transconductance are −26.1 μS (V = −3.1 V) and 19.4 μS (V = 2.9 V), respectively. Compared with the maximum g of graphene on the SiO2/Si substrate (2.6 μS), it can be concluded that the regulation ability of the Al2O3 dielectric layer is about 10 times that of SiO2, which is in accordance with previous estimations. Accordingly, the value of effective dielectric constant for Al2O3 is 9.2, which is consistent with the theoretical dielectric constant (8~10) of the Al2O3 film grown by ALD [28]. The changes of the Fermi level of graphene can be fitted with the theoretical model [29]: where E is the Fermi level, n is the induced charge amount, h is the Planck constant, is the Fermi speed, q is the elementary charge, and V is the Dirac point. The amount of charges induced by the applied gate voltages on different substrates is shown in the inset of Figure 5b. Obviously, as the thickness decreases and the dielectric constant increases, the shift of the Fermi level of graphene on the Al2O3/Si substrate is far greater than that on the SiO2/Si substrate. In order to evaluate the mobility of the devices, a device model was used [27]. The extracted carrier mobility of graphene FETs on the Al2O3/Si substrate is 6500 cm2 V−1·s−1, which is similar to 6780 cm2 V−1·s−1 of the FETs on the SiO2/Si substrate. The replacement of the substrate does not lead to the degradation of the transport performance of the devices. Furthermore, transfer characteristic of few-layer graphene FETs on an Al2O3/Si substrate was depicted in Figure S4, showing that Al2O3 gating substrate is also suitable for few-layer graphene.
Figure 5

(a) g–V curves of graphene FETs on different substrates. (b) E–V curves of graphene FETs on different substrates. The inset shows the variation tendency of the induced charge against gate voltage.

We also systematically studied the electrical properties of few-layer WS2 on the Al2O3/Si substrate (Figure 6a). The number of layers was determined by Raman and Photoluminescence spectra (see Figure S5). A single layer was not used because the surface states of single-layer TMDs are easily affected by the external environment in the process of device fabrication, thus losing the intrinsic property [30]. As Figure 6b shows, the current varies nonlinearly against the change in bias voltage from −1 to 1 V. This is due to the formation of the Schottky barrier between WS2 and metal contact, which was widely reported in previous studies [30,31,32]. However, from the inset of Figure 6b, it can be seen that the linearity is maintained fairly well under the condition of small bias voltage. Hence, the bias voltage is maintained at 0.1 V in the following test.
Figure 6

(a) Three-dimensional schematic view of the few-layer WS2 FETs. (b) Output characteristics of few-layer WS2 on Al2O3/Si substrates in large bias and (inset) small bias voltage. (c) Transfer characteristics of few-layer WS2 FETs on different substrates. (d) gm–Vg curves of few-layer WS2 FETs on different substrates.

Figure 6c illustrates the transfer characteristics of few-layer WS2 on different substrates, and both of them distinctly exhibit n-type behavior conduction [31]. When the gate voltage changes from −10 to 10 V, devices on Al2O3/Si substrates turn from the off state (2.8 pA) to the on state (2.5 μA). Therefore, the unit on/off ratio is as highly as 105 V−1, which is far greater than that on the SiO2/Si substrate (1.5 × 103 V−1). As depicted in Figure 6d, the maximum transconductance (red rectangle) of few-layer WS2 can reach about 0.92 μS (Vg = 2.3 V), and the corresponding carrier mobility is calculated to be 239 cm2·V−1·s−1. However, as the gate voltage continues to increase, the transconductance starts to decline, indicating that the carrier mobility has reached the maximum value. Compared with the maximum transconductance of few-layer WS2 on the Si/SiO2 substrate (1.5 × 10−2 μS), the gate control ability was significantly improved (61.3 times). Furthermore, the Al2O3 substrate is a better alternative for other 2D materials (such as WS2).

4. Conclusions

In summary, Al2O3/Si substrates are superior for the visualization of graphene and fabrication of graphene transistors. Compared with SiO2/Si substrates, Al2O3/Si substrates can enhance the optical contrast of graphene by up to 2.4 times. Furthermore, using the Al2O3 film as the gate dielectric, the transconductance of graphene FETs exhibited an approximately 10-fold increase. Significantly, this substrate is also more suitable for other 2D materials, such as WS2, and can remarkably enhance the transconductance by 61.3 times.
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