Metasurface-Programmable Wireless Network-On-Chip.

This paper introduces the concept of smart radio environments, currently intensely studied for wireless communication in metasurface-programmable meter-scaled environments (e.g., inside rooms), on the chip scale. Wireless networks-on-chips (WNoCs) are a candidate technology to improve inter-core communication on chips but current proposals are plagued by a dilemma: either the received signal is weak, or it is significantly reverberated such that the on-off-keying modulation speed must be throttled. Here, this vexing problem is overcome by endowing the wireless on-chip environment with in situ programmability which enables the shaping of the channel impulse response (CIR); thereby, a pulse-like CIR shape can be imposed despite strong multipath propagation and without entailing a reduced received signal strength. First, a programmable metasurface suitable for integration in the on-chip environment ("on-chip reconfigurable intelligent surface") is designed and characterized. Second, its configuration is optimized to equalize selected wireless on-chip channels "over the air." Third, by conducting a rigorous communication analysis, the feasibility of significantly higher modulation speeds with shaped CIRs is evidenced. The results introduce a programmability paradigm to WNoCs which boosts their competitiveness as complementary on-chip interconnect solution.

Introduction

Wireless millimeter‐wave (mmW) communication between processors on multi‐core chips is a potential solution to avoid that inter‐core information exchange soon becomes a computation speed bottleneck.[ , , , ] Yet, such a wireless network‐on‐chip (WNoC) is confronted with its own challenges: either the received signals are too weak or severe multipath curbs the information transfer rate.[ ] In this article, we overcome this dilemma by endowing the on‐chip electromagnetic (EM) propagation environment with programmability. To that end, we integrate a programmable metasurface,[ , , ] also referred to as a reconfigurable intelligent surface (RIS), into the chip package (see Figure  )—analogous to current RIS‐based efforts at the indoor scale.[ , , , , , ] We demonstrate that the on‐chip RIS can be configured such that the channel impulse response (CIR) becomes pulse‐like despite strong multi‐path propagation and without yielding weak received signals. We further evidence that shaped CIRs can sustain significantly larger modulation speeds and still satisfy a given bit‐error‐rate (BER) objective.

Figure 1

Metasurface‐programmable wireless on‐chip environment. a–c) Maps of the spatial field magnitude (for the field component that is perpendicular to the chip plane) along a horizontal slice inside the chip package shown in (d,e) with t = 100 µm for the indicated parameters (frequency and vertical height h). The colormap is linear. In addition, the transmitter (TX) and receiver (RX) locations considered in this paper are indicated in (a). d) Overview of the considered chip architecture. The chip is equipped with a 5 × 5 programmable metasurface in its ceiling. A part of the chip package is removed in this figure to show the interior. e) Vertical slice through the middle of the chip shown in (d), revealing the different layers and the programmable meta‐atoms. f) Detailed design of the considered programmable meta‐atom.

Traditionally, wireless communication is optimized in terms of transceiver hardware and pre‐/post‐processing of the signals but the propagation medium is considered uncontrolled. Recently, the emergence of programmable metasurfaces—ultrathin arrays of elements with individually reconfigurable scattering responses—has led to a paradigm shift: “smart” programmable wireless propagation environments.[ ] Therein, programmable metasurfaces are leveraged as RISs to shape the wireless channels. The desired channel shaping functionality largely depends on the amount of scattering in the environment: There are also cases of backscatter communication in which the RIS itself encodes information by shaping wireless channels.[ , ] RISs are usually based on programmable metasurfaces operating in reflection such that they can be mounted on walls, but for completeness we note that ideas about RISs that operate simultaneously in reflection and transmission are being investigated, too.[ , ] To date, all of these ideas are explored for meter‐scaled environments, such as office rooms.

In free space, RISs, in combination with carefully aligned emitters, can replace costly phased‐array antennas for beam‐forming.[ , , , ]

In quasi‐free space with blocked line‐of‐sight, RISs can serve as an alternative relaying mechanism.[ , , , , ]

In rich‐scattering environments, wireless propagation is qualitatively sharply different from the previous two cases.[ ] Rich scattering occurs, for example, inside irregularly shaped metallic enclosures such as vessels, airplanes, trains, or cars, as well as inside certain indoor settings in buildings.[ , ] In rich‐scattering scenarios, the field at any given point is a seemingly random superposition of waves arriving from all possible angles with all possible polarizations and diverse delays. Consequently, the field pattern is speckle‐like[ ] and direct line‐of‐sight links are insignficant or inexistent. Such rich‐scattering conditions are qualitatively very different from multipath scenarios solely involving a few known scatterers. In rich‐scattering environments, RISs can create spatial monochromatic hotspots,[ , , , ] shape the multipath CIR,[ , ] or optimize the spatial MIMO channel diversity.[ ]

Two to three orders of magnitude smaller are on‐chip wireless environments. The reason to consider a partial[ ] replacement of conventional wired interconnects on chips with WNoCs is related to scalability limits: more and more processing cores are crammed onto modern chips but wired interconnects must be kept short due to Ohmic losses and wire delays, leading to more and more inter‐router hops. Consequently, both latency and power consumption of communication between far‐apart cores deteriorate,[ ] the latency reaching up to several tens of nanoseconds.[ ] As a result, communication rather than computation is becoming the main performance bottleneck of multicore chips. To break these communication‐related scalability barriers of current multicore architectures, complementary interconnect technologies are currently being explored. On the one hand, these involve approaches based on guided waves such as nanophotonic networks[ , , , , ] or radio‐frequency transmission lines[ , ] which benefit from energy efficiency and a large bandwidth; however, guided approaches intrinsically rely on physical infrastructure to connect the nodes which scales unfavorably because it requires increasingly stronger sources or more amplifiers, centralized arbitration, etc. On the other hand, WNoCs[ , ] avoid inter‐router hops and promise low‐latency broadcasting combined with intrinsic system‐level flexibility.

However, on‐chip antennas and radio transceivers[ , , , , , , , , , , , ] are subject to size and power constraints; in particular, their processing power is limited such that WNoCs typically rely on simple modulation schemes such as on/off keying (OOK).[ , ] Thus, inter‐symbol interference (ISI) must be avoided in WNoCs at the cost of lower data transmission rates when the CIR is lengthy due to multipath. From the EM wave's perspective, a typical on‐chip environment constitutes a metallic enclosure (solder bumps on the bottom, metallic package on sides and top)—a “micro reverberation chamber.”[ ] While this enclosure seals the EM on‐chip environment from the outside, making it extraordinarily static, predictable, and secure, the enclosure also causes waves to heavily reverberate, yielding lengthy CIRs and the associated ISI problem. Reverberation can be suppressed through strong attenuation of the waves (e.g., by a thick silicon layer). But strong attenuation implies poor received‐signal‐strength‐indicators (RSSIs). This yields the on‐chip RSSI‐ISI dilemma: either we face poor RSSI or the ISI problem. Poor RSSIs can be counteracted by transmitting stronger signals[ ] and trade‐offs between the RSSI and ISI effects can be found,[ ] but ideally one would have high‐RSSI channels with pulse‐like CIRs despite strong multipath.

In this article, we demonstrate that this goal is potentially attainable if the CIR can be shaped with an on‐chip RIS. In other words, we show that a RIS‐parametrized WNoC can be programmed to equalize on‐chip wireless channels “over the air”. From an information theoretic perspective, it is important to note that in general a pulse‐like CIR is not optimal in terms of the channel capacity, which is a modulation‐independent upper bound on the information transfer rate.[ , , ] Indeed, rich‐scattering‐induced multipath effects can boost the achievable capacity by making different channels more distinguishable,[ , ] but suitable equalization protocols must be applied to the received signals. Nonetheless, for the specific simple modulation scheme used in WNoC, namely OOK, one can faithfully expect that the achievable information transfer is most reliable and efficient with a pulse‐like CIR. Inside the static chip enclosure, there is hence a clear motivation to mitigate ISI by using an on‐chip RIS to impose a pulse‐like shape of the CIR. In Section 5 of this article, we evidence that the bit‐error‐rate (BER; a modulation‐specific metric) with OOK can indeed be orders of magnitude lower for a given modulation speed and noise level if an on‐chip RIS is configured to impose a pulse‐like CIR.

The concept of RIS‐empowered CIR shaping is also relevant to other wireless communication settings which involve transceivers with low computational power facing lengthy CIRs, for example, Internet‐of‐Things devices in indoor environments. A rigorous demonstration of the concept was experimentally reported at the indoor scale inside a rich‐scattering enclosure for the 2.5 GHz range in ref. [29]. The fundamental underlying physical mechanism is based on altering the delays of the different multipath rays such that they interfere constructively (destructively) at (before/after) the time of arrival of the main CIR tap.[ ] This mechanism is hence not based on the absorption of all multipath components. More recently, the concept of RIS‐empowered “over‐the‐air equalization” has also been explored based on channel models.[ , , , , ] However, refs. [67, 69] consider a simple free‐space two‐path channel, and the remaining works, with the exception of ref. [70], utilize channel models that are not compatible with all aspects of wave physics. Specifically, they appear to violate causality, to neglect the long‐range mescoscopic correlations at the origin of the non‐linear RIS‐parametrization of the fading wireless channels[ , , ], and to ignore the frequency selectivity of the RIS element as well as the intertwinement of its amplitude and phase response. To ensure the reliability of the present work, we use full‐wave simulations which are computationally costly but guaranteed to respect wave physics.

The remainder of this paper is organized as follows. In Section 2, we summarize a prototypical chip architecture and illustrate the ensuing RSSI‐ISI dilemma. In Section 3, we detail our design considerations for an on‐chip RIS and thoroughly characterize our proposed design. In Section 4, we demonstrate on‐chip RIS‐empowered CIR shaping. In Section 5, we evaluate the associated advantages for the achievable BER. In Section 6, we discuss our results. In Section 7, we summarize our contributions and identify avenues for future research. Details on our methods are provided in Section 8.

On‐Chip RSSI‐ISI Dilemma

To elucidate the RSSI‐ISI dilemma, we analyze the impact of the silicon layer's thickness on RSSI and ISI. We rely on full‐wave simulations (detailed in Section 8) of the simplified model of the on‐chip wireless environment that is shown in Figure 1. We consider a prototypical 22 × 22 mm2 chip inside a metallic package of footprint 33 × 33 mm2, as shown in Figure 1d; such a chip could host 4 × 4 cores surrounded by air. The chip, illustrated in Figure 1e, is a layered structure consisting of a very thin layer of solder bumps (a typical thickness is 0.0875 mm) on top of the package substrate, followed by a 0.011 mm thick silicon‐dioxide (SiO2) layer, a silicon (Si) substrate layer of thickness t and finally a 0.8 mm thick aluminum nitride (AlN) layer.[ ] For simplicity, we assume that these layers are continuous without physical gaps between different cores. Moreover, we consider electrically small slot antennas as ports (see Section 8). These almost omni‐directional antennas have a low directivity, in line with most antennas proposed for WNoCs, because WNoC antennas must broadcast information to receivers located in all possible directions around them.

The rich‐scattering nature of the wireless on‐chip environment is immediately obvious upon visual inspection of typical field magnitude maps like the ones displayed in Figure 1a–c. Scattering occurs at the chip package boundaries that act like a micro reverberation chamber as well as at interfaces of materials with different dielectric constants within the enclosure. The field maps display the speckle patterns characteristic of rich scattering and wave chaos.[ ] The spatial extent of each speckle grain is Δl corr ≈ λ0/2. The wavelength λ0 depends on the relative permittivity of the propagation medium which is around nine times higher within the AlN layer than within the surrounding air. The speckle grains' approximately isotropic nature is direct evidence of the superposition of waves incident from all possible angles of arrival. Clearly, free‐space intuition and concepts like beam‐forming are not applicable in such a rich‐scattering environment.

The field rapidly decorrelates not only as a function of spatial position (compare Figure 1a and Figure 1b) but also as a function of frequency f 0 (compare Figure 1a and Figure 1c). The spectral extent of each speckle grain is Δf corr ≈ f 0/Q, where Q is the enclosure's composite quality factor. The latter essentially quantifies how often a ray bounces around the enclosure before becoming insignificant due to attenuation. Q is hence directly related to the CIR duration. We evaluate Q as πf 0/μ, where f 0 = 60 GHz is the center of the considered frequency band (from 55 to 65 GHz) and μ is the exponential decay constant of the average of the CIR magnitude envelopes. For a silicon layer of thickness t = 100 µm that is considered in Figure 1a–c, we obtained Q = 252. As the thickness of the absorbing silicon layer is increased to 150 µm and 200 µm, the waves are attenuated quicker, the CIR becomes shorter, and we find Q = 74 and Q = 56, respectively. For even thicker silicon layers, the CIR is pulse‐like without any significant tail[ ] such that no meaningful value of Q can be determined.

At the same time, the longer the waves reverberate, the more energy accumulates inside the enclosure and the stronger is the received signal. A higher value of Q corresponds both to more stored energy and a higher dwell time. In other words, a stronger RSSI is inevitably associated with a longer CIR, the latter directly implying more ISI in OOK modulation. We illustrate this RSSI‐ISI dilemma in Figure  , where we plot the CIRs between a transceiver pair separated by 9 mm for different values of the silicon layer's thickness[ ]. In addition, we show the corresponding channel spectra S 12( f) and we quantify the pathloss as <|S 12( f)|> .

Figure 2

Example CIR profiles for various silicon layer heights. Different values of the silicon layer height are color‐coded. The displayed CIRs correspond to the TX‐RX3 transceiver pair shown in Figure 1a (the two ports are separated by 9 mm). The top right inset shows the corresponding channel spectra magnitudes |S 12( f)| over the considered 55 GHz < f < 65 GHz interval. The top left inset plots our pathloss metric <|S 12|> as a function of silicon layer thickness.

Remark 1: The absolute values of this pathloss metric are relatively low because of the considered electrically small and near omni‐directional slot antennas.

Remark 2: The antenna separation of 9 mm corresponds at 60 GHz to more than five wavelengths in AlN and more than six wavelengths in Si.

The on‐chip RSSI‐ISI dilemma is immediately obvious: for thick silicon layers (t > 250 µm), the spectrum is essentially flat and the CIR is almost pulse‐like (similar to quasi‐free space) but the RSSI is very low. For thinner silicon layers, the RSSI can increase by almost 20 dB but the spectrum displays more and more dispersion, resulting in lengthy CIRs. The latter evidence substantial reverberation and rich scattering inside the chip enclosure and pose a severe ISI challenge for OOK. The CIR maximum does not even have to coincide with the first CIR peak, as seen for the light‐blue CIR in Figure 2. Indeed, the mean delay of the channel[ ] for the considered transmitter–receiver pair is 0.56 ns for the 100 µm thick silicon layer and drops down to 0.14 ns for silicon layers thicker than 250 µm. Hence, the majority of the signal energy arrives not along the shortest path but after significant reverberation at a later time for the scenarios with a thin silicon layer. Note that in the absence of a line‐of‐sight, the shortest path cannot be related to the antenna separation.

On‐Chip RIS Design and Characterization

To eliminate the on‐chip RSSI‐ISI dilemma, we integrate a RIS into the ceiling of the chip package, as seen in Figure 1d,e. The design of our programmable metasurface is detailed in Figure 1f; the programmable meta‐atom design is based on the well‐known mushroom structure[ , ] equipped with a varactor diode which individually alters the effective capacitance of the meta‐atom and shifts its resonance frequency. While the current RIS literature considers meter‐scale applications that operate in air, our on‐chip RIS must operate within an aluminum nitride layer whose high dielectric constant (≈8.8) might require small varactors with very large effective capacitances. To avoid this problem, we design the meta‐atom with one side to be air/vacuum (in future implementations a low‐dielectric‐constant substrate). Interestingly, such a configuration is the opposite of usual RIS designs where the metamaterial element is implemented on a high‐dielectric‐constant substrate and operates within air. Further details on our on‐chip RIS design are presented in Section 8.

Remark 3: Our generic proposal of shaping the CIRs of WNoCs with an on‐chip RIS does not depend on the specific RIS design. The design proposed in this section is illustrative of a suitable design but not heavily optimized. Given the rich‐scattering nature of the on‐chip wireless environment, we do not seek to implement an analytically calculated surface impedance with high precision. Instead, the purpose of each RIS element is to maximally impact as many ray paths as possible, and using the iterative procedure detailed in Sections 4 and 8 we learn how to configure the RIS in situ. Our algorithm adapts to any given properties of the RIS (including possible fabrication inaccuracies) and the rich‐scattering wireless environment.

We first characterize the fundamental building block of our on‐chip RIS in the conventional manner: we study the reflection under normal‐incidence illumination of an infinite array of our programmable meta‐atom—see Figure  . The magnitude and phase of the reflected wave display a resonant behavior in the targeted frequency range around 60 GHz (see also the Supporting Information); by changing the varactor's capacitance from 0.1 to 1 pF, this resonance can be tuned. However, this conventional unit‐cell characterization method i) assumes single channel excitation (normal plane wave) even though waves with all possible angles of incidence impinge on the meta‐atom in the chip environment; ii) neglects the impact of coupling effects between neighboring RIS elements; and iii) neglects the influence of the metallic chip enclosure ceiling and the multi‐layer dielectric chip volume; all three factors can significantly alter the response. As seen in Figure 1d,e, we intend to deploy distributed 2 × 2 groups of synchronized meta‐atoms, each group controlled by a single bias voltage line; we refer to these groups as meta‐pixels. Compared to the characterization setting from Figure 3a,b, the loading from the infinite array is removed for this 2 × 2 configuration. Overall, our on‐chip RIS consists of a 5 × 5 array of such meta‐pixels and covers 3.3% of the chip package ceiling, as seen in Figure 1d,e. For simplicity, we limit ourselves to 1‐bit (binary) programmable meta‐pixels in the following. The choice of the two states (0.1 or 1 pF) is aimed at broadband all‐angle efficient modulation as opposed to single‐frequency single‐angle efficient modulation (see also Supporting Information). Moreover, the ratio between the two capacitance values for the two states should not become too large. Overall, again, we have not heavily optimized this choice but it is an example of a suitable choice that allows us to demonstrate CIR shaping.

Figure 3

Characterization of the on‐chip RIS. a,b) Conventional normal‐incidence unit‐cell characterization method. A plane wave is normally incident on an infinite array of programmable meta‐atoms, that is, using periodic boundary conditions on all four sides of the meta‐atom. Amplitude (a) and phase (b) of the reflection coefficient R are shown for ten values of the varactor capacitance. c,d) In situ characterization method. Channel magnitudes |S 12( f)| for three different receiver locations (color‐coded, see Figure 1a for locations) and 32 random RIS configurations evaluated directly in the considered WNoC setting (c). Standard deviations σ( f) of the complex‐valued channels S 12( f) for each pair of transceiver locations (color‐coded), and averaged (black) (d).

To better understand the true potential for wave‐field manipulation with our on‐chip RIS in our targeted on‐chip application, we perform a second characterization in situ. Specifically, we evaluate within the targeted on‐chip environment shown in Figure 1 the channel S 12 between various pairs of antennas, each time for 32 random RIS configurations. The standard deviation σ of these complex‐valued channels across different configurations is a reliable metric of the ability of the RIS to manipulate these channels in the considered setting.[ , , ] The ability of our RIS to modulate frequencies across the entire considered 55 − 65 GHz band is now evident in Figure 3c,d.

We note that the presence of the on‐chip RIS elements notably decreases the reverberation time of the on‐chip enclosure because the on‐chip RIS partially absorbs the waves that are impinging upon it. Indeed, we find that for a 100 µm thick silicon layer the enclosure's quality factor drops from Q = 252 to Q = 140. Correspondingly, our pathloss metric <|S 12|> drops from −41 dB to −51 dB. Nonetheless, this remains the rich‐scattering regime. As noted above, the physical mechanism of RIS‐empowered over‐the‐air equalization relates to tailored constructive and destructive interferences rather than absorption. In fact, whether the additional absorption due to the presence of the on‐chip RIS improves (shorter CIR) or deteriorates (lower RSSI) the wireless performance cannot be answered in general but depends on parameters such as the OOK modulation speed and the noise level, as discussed in Section 5. The additional RIS‐induced absorption could be reduced by designing an alternative RIS for which, for example, the resonances are moved away from the band of utilized WNoC frequencies. The additional RIS‐induced absorption can also be counter‐balanced by adjusting the silicon layer's thickness. For instance, we find that our pathloss metric for a 100 µm‐thick silicon layer with RIS is that of a 160 µm‐thick silicon layer without RIS.

On‐Chip CIR Shaping

We now proceed with optimizing the on‐chip RIS configuration to achieve the desired CIR shape, namely a pulse‐like CIR despite rich scattering. In contrast to RIS deployments in free space that usually identify the optimal configuration based on an analytical formulation of wave propagation, the complexity of the rich scattering inside the chip enclosure makes analytical analysis unfeasible. Instead, we use an iterative optimization algorithm that identifies in situ a suitable metasurface configuration during a calibration step, solely based on in situ CIR evaluations for different RIS configurations.

Remark 4: This in situ iterative optimization of the RIS configuration does not rely on knowledge from a prior characterization of the metasurface and will automatically account for any possible deviations of meta‐atom properties from the designed ones that may arise in practice. Therefore, fabrication inaccuracies will not impact our conclusions.

As detailed in Section 8, first, we define a cost function that quantifies the portion of energy in the strongest CIR tap relative to the CIR's total energy; second, we use an iterative optimization to identify a RIS configuration that optimizes . To expedite the search within the huge search space (225 possible RIS configurations), we determine a reasonably good initial guess: the best out of 32 random RIS configurations. Then, we flip the state of one meta‐pixel at a time, and keep the change of its state if the CIR has become more pulse‐like according to our criterion. It is not sufficient to test each meta‐pixel only once because the presence of reverberation inside the chip enclosure correlates the optimal states of different meta‐pixels[ ]—see Figure 8b.

Figure 8

Optimization dynamics of Algorithm 1 for the case shown in Figure 4. a) Step 1 of Algorithm 1: Evaluation of 32 random RIS configurations. b) Step 2 of Algorithm 1: Iterative optimization of the RIS elements, looping twice over each element.

An example outcome of this protocol for on‐chip CIR shaping is displayed in Figure  for the case of a 100 µm thick silicon layer and 9 mm distance between transmitter and receiver (TX‐RX3). Our optimization progressively flattens the CIR behind the first peak, such that the modulation rate for OOK‐based data transmission between the ports can be increased substantially. It is also apparent that for the optimized configurations roughly half of the RIS elements are in one and the other half in the other one of the two possible states, without any intuitively understandable pattern. This is expected in a rich‐scattering system and in contrast to the (analytically calculated) RIS patterns used for beam‐forming in free space.[ ]

Figure 4

CIR optimization with on‐chip RIS. a) CIR intensity profiles for 32 random on‐chip RIS configurations (color‐coded), and the average CIR (black). b) Best out of the 32 random configurations. c) Optimum after one optimization loop. d) Optimum after two optimization loops. The insets indicate the corresponding RIS configurations and antenna locations.

To illustrate the generality of our technique, as well as its real‐time in situ adaptability to dynamic traffic patterns,[ ] we apply it also to two other pairs of antenna locations on a chip with a 100 µm thick silicon layer as well as to one case on a chip with a 200 µm thick silicon layer. The effectiveness of our technique is clearly seen for all three cases in Figure  . In the first case, the iterative optimization does not yield any improvement upon the ensemble optimum. In the third case with a 200 µm thick silicon layer, the CIR is, of course, shorter but our technique is effective nonetheless in improving the CIR profile toward a pulse‐like shape for OOK purposes. Overall, these three further examples confirm that depending on traffic needs on the chip, the CIR of a selected antenna pair can be shaped to be pulse‐like, irrespective of antenna separation and silicon layer thickness.

Figure 5

Further examples of CIR shaping. Different transceiver separations and silicon layer thicknesses are considered—see insets in (a,c,e). CIR intensity profiles for 32 random realizations (a,c,e) as well as the ensemble average (black), ensemble optimum (red), and iteration optimum (blue) are shown (b,d,f).

Before closing this section, we underline the relevance of ergodicity in wave chaos for the generality of our results. According to the concept of ergodicity, different realizations of the considered system are governed by the same statistics. Therefore, in a system that is merely a different realization of our prototypical system (geometrically modified while keeping global parameters like Q constant), one can faithfully expect to achieve similar amounts of wave control with the same RIS (of course, the optimal RIS configurations would be a different one). Thus, simplifications in our prototypical model do not impact the generality of our conclusions.

Communication Analysis

Having sculpted the CIRs into the desired pulse‐like shape despite severe multipath in Section 4, we now proceed to evidencing the ensuing advantages in the targeted OOK communication scheme in terms of the BER. To be an enticing alternative to wired interconnects, WNoCs would have to reach BERs below 10−15 at symbol rates of at least 10 Gb s−1.[ ] A rigorous evaluation of the BER consists in simulating the transfer of many symbols at a specific noise level and modulation speed in order to determine how many symbols were received incorrectly. It is clear that such a rigorous analysis cannot be conducted for 1015 or more symbols due to the associated computational cost, and therefore it is impossible to confirm BERs below 10−15 through rigorous analysis.

A commonly used work‐around is to assume that simple analytical expressions for the BER are applicable,[ ] including a treatment of ISI as random noise. However, “ISI noise” exhibits strong correlations; moreover, because for BERs below 10−15 we would be interested in extreme outliers of a statistical distribution (the one incorrectly transmitted symbol out of 1015 symbols), it is impossible to confirm that such approximations accurately describe the physical reality by looking at statistical moments like the mean or the variance. Therefore, instead of seeking an approximate quantitative analysis that confirms BERs below 10−15, here we opt for a rigorous qualitative BER analysis to evidence the advantages of our sculpted CIRs. We focus on regimes with higher BERs (around 10−2) where we can robustly estimate the BER with our rigorous analysis based on “only” 2.28 × 105 transmitted symbols (see Section 8). Consequently, the reader's attention should be on the qualitative changes of the BER curves that we present rather than on specific BER values. In any case, the quantitative BER results could be improved i) through techniques such as return‐to‐zero modulation and threshold adaptation,[ ] and ii) by using carefully designed antennas (instead of electrically small ports). If well‐matched antennas were used, the amount of radiated and captured energy would increase; thereby the RSSI and ultimately the SNR would increase for any given combination of modulation speed and noise level, thus improving the BER.

For concreteness, we focus on the sculpted CIR from Figure 4 for our OOK communication analysis in Figure  ;[ ] recall that in this setting the chip's silicon layer is 100 µm thick. To meaningfully interpret the dependence of the sculpted CIR's BER in OOK‐based communication on modulation speed and noise level, we identify the following three benchmarks:

Figure 6

BER in OOK on‐chip communication. The top bar indicates the considered range of the ratio ρ = P t/P n between transmitted power P t and noise power P n. Note that ρ is not the SNR at the receiver because the latter depends on the pathloss which differs in the considered scenarios. For six representative values of ρ, we plot the dependence of the BER on the modulation speed for the TX‐RX3 wireless on‐chip link. We consider four scenarios: (blue) 100 µm silicon layer with optimized RIS configuration; (red) 160 µm silicon layer without RIS (same pathloss as blue); (yellow) 100 µm silicon layer without RIS; (purple) 100 µm silicon layer with random RIS configuration, averaged over five random RIS configurations. The raw BER results based on 2.28 × 105 symbols are indicated with dots, while the continuous line is a smoothed version thereof. We further illustrate the benefits of RIS‐empowered CIR shaping for ρ = 70 dB and a modulation speed of 3.875 GS s−1. We simulate the transfer of a photographic image of a Phlox subulata flower taken in Alzenau, Germany, for the first three considered scenarios. The ground truth and the three received images are shown.

A chip without RIS and 160 µm thick silicon layer, because the pathloss for the considered channel, quantified as <|S 12( f)|> , is the same as for our chip with RIS and 100 µm thick silicon layer. The additional silicon thickness thus mimics the additional absorption originating from the presence of a RIS.

A chip without RIS and 100 µm thick silicon layer, that is, the chip we consider without adding the RIS. The pathloss is thus less because the additional absorption due to the RIS is missing.

A chip with randomly configured RIS and 100 µm thick silicon layer. Specifically, we report the average BER based on five random RIS configurations. This benchmark helps to determine if potential BER improvements are due to the mere presence of the RIS (this benchmark) or rather its judicious configuration (the result from Figure 4).

Besides the CIR, the BER also pivotally depends on the OOK modulation speed and the noise level. Because the pathloss depends on the wireless channel, we quantify the noise level in terms of the ratio of transmitted power P t to noise power P n, namely ρ = P t/P n, as opposed to using the SNR of the received signal. As seen in Figure 6, the noise level defines two extreme regimes. For low values of ρ, the communication is SNR‐limited: no matter what wireless channel and modulation speed is used, the BER almost reaches its upper bound of 0.5. At the other extreme, for high values of ρ, OOK communication is ISI‐limited: in this regime, wireless communication can be successfully operated with low BER if wireless channel and modulation speed are chosen appropriately. In this regime, for a given wireless channel, lowering the modulation speed reduces the BER because it mitigates ISI. Moreover, differences between the considered wireless channels are very significant in this regime.

As soon as ρ is sufficiently large for the communication not to be SNR‐limited, the benefits of CIR shaping manifest themselves. For the examples in Figure 6 with medium or high ρ, the blue curve corresponding to the RIS‐optimized CIR lies significantly below the three benchmarks. For concreteness, consider that our targeted maximum BER is 10−2 for ρ = 70 dB. Then, the optimized RIS configuration would allow us to operate at 4 GS s−1, which is twice the maximum modulation speed at which the best out of the three benchmarks (red) could guarantee a maximal BER of 10−2. We visualize these differences by emulating the transfer of a color image across the considered channels at 3.875 GS s−1 and ρ = 70 dB. While the RIS‐shaped channel transmits the image almost flawlessly, the benchmark channels yield heavily distorted received images. A successful transmission of the image via the benchmark channels would require a much lower modulation speed.

From these results, we conclude that:

It is the judicious configuration of the RIS as opposed to its mere presence in a random configuration that yields substantial performance improvements (blue vs purple curves).

Absorption by the RIS is not a significant effect because benchmarks with the same pathloss perform much worse (blue vs red curves).

Lower pathloss is by no means a guarantee for a lower BER except for when the wireless channel is SNR‐limited. Indeed, the wireless channel with the lowest pathloss (yellow) performs best (but still poorly) only for low values of ρ.

All three points confirm that the mechanism underlying our CIR shaping is not related to the additional absorption introduced by the presence of the RIS in the on‐chip environment. Instead, as outlined in Section 1, by controlling the delays of different paths, we create constructive (destructive) interferences at (before/behind) the main CIR tap.

Discussion

The ability of the RIS to shape the CIR depends on several factors and can hence be improved accordingly. The most important question is, how many of the rays that connect the transmitter to the receiver have encountered the RIS? The percentage of rays manipulated by the RIS can be increased by: i) using more RIS elements (currently our RIS covers only 1.5% of the interior chip package surface); ii) placing the RIS elements closer to the transceivers; and/or iii) operating in an environment with more reverberation. Moreover, the design of the RIS elements can be optimized further, and linear instead of binary control would also enhance the available control over the EM field. In addition, linear programmability would help to deploy more efficient gradient‐descent optimization algorithms to search the huge optimization space. A further consideration regards the EM field polarization. Assuming that the field inside the chip enclosure is approximately chaotic, which is a reasonable assumption when the silicon layer is thin, means that all polarizations are well mixed and the restriction of our meta‐atom to engage mainly with one polarization is not problematic, as evidenced by our results. However, if each meta‐atom could independently control both orthogonal field polarizations, the available tunable degrees of freedom would be doubled. Inside a rich‐scattering environment, statistically, a meta‐atom with independent dual‐polarized control is expected to offer as much wave‐control as two meta‐atoms with single‐polarized control that are separated by at least half a wavelength. A meta‐atom with dual‐polarization control would involve multiple tunable components, as in refs. [82, 83].

In contrast to the meter‐scaled smart indoor environments that dynamically evolve due to the motion of inhabitants, smart on‐chip EM environments are sealed and extraordinarily static such that suitable RIS configurations for various traffic patterns can be identified in a one–off calibration phase. However, the influence of temperature fluctuations on the wireless channels remains to be investigated; the dielectric constant of the different chip layers may vary with temperature such that the wireless on‐chip channels could evolve. A significant temperature dependence would call for a self‐adaptive on‐chip RIS that updates its configuration based on a current temperature estimate.[ , ] Such an estimate could be derived from knowledge of the current chip activity or based on a simple temperature sensor.

Conclusions and Outlook

To summarize, we demonstrated that the integration of a RIS into an on‐chip wireless environment can endow the latter with programmability, a functionality that we leveraged to achieve pulse‐like CIRs despite rich scattering. Thereby, we overcame the RSSI‐ISI dilemma that plagues current WNoC proposals: we mitigated ISI without simultaneously reducing the RSSI. Pulse‐like CIRs enable faster data transmission rates in OOK communication because they equalize the wireless on‐chip channel “over the air.” Our rigorous OOK communication analysis confirmed that RIS‐shaped CIRs can double the permissible modulation speed for a given desired BER value at a given noise level.

Looking forward, more complex communication scenarios such as communication from one transmitting to multiple receiving nodes (SIMO) deserve attention.[ , , ] Ultimately, experimental validation of all these ideas will be indispensable in the future. Moreover, our proposed smart on‐chip EM environment can be endowed with a second functionality related to wave‐based analog signal‐processing by bringing recent proposals of wave processing in (programmable) scattering enclosures for matrix multiplication,[ ] signal differentiation,[ ] or reservoir computing[ ] to the chip scale. Such analog “over‐the‐air” computing holds the promise to be faster and more energy efficient than its electronic digital counterpart for specific computational operations, paving the way to hybrid analog‐digital processing chips. We also foresee the possibility of communication‐efficient RIS‐empowered on‐chip federated learning for the collaboration of different cores on the same chip to train a machine‐learning model.[ , ]

A further avenue for future exploration is to consider similar problems of data exchange inside rich‐scattering enclosures at intermediate scales between the chip scale and the indoor scale. Relevant examples include communication inside racks or blades, inside the chassis of personal computers, or inside data centers.[ , , ]

Methods

Full‐Wave Simulation Setup

The on‐chip environment was accurately modeled and characterized with the Ansys High Frequency Structural Simulator (HFSS), a field solver based on the finite‐element method. HFSS simulated wave propagation in the 3D on‐chip environment and produced the scattering parameters associated with the connected ports. HFSS's automatic mesh generator was used. HFSS's output was the channel S 12( f) between the two ports in the frequency domain, and an inverse Fourier transform was used to obtain the corresponding CIR.[ ]

The solder bumps on the bottom and the chip package on the top and sides were taken to be copper which was modeled as (lossy) conductive surface in HFSS. Because the entire simulation domain was surrounded by this copper layer, no further boundary conditions remain to be specified. Given that the granularity of the solder bump layer is deeply sub‐wavelength, it is common to describe this as solid metallic layer.[ ] The high complexity of the wireless on‐chip environment that gives rise to speckle‐like wave fields (see Figure 1a‐c) implies that operation in the rich‐scattering regime was considered in which the concept of ergodicity guarantees that different realizations will be governed by the same statistics. Specifically, this means that in a wireless on‐chip environment that differs from the considered one in some geometrical detail, a similar degree of channel shaping could be achieved, while, of course, the optimal RIS configuration would be a different one. Therefore, the very complex deeply sub‐wavelength metallic patterning of the solder bumps does not affect any of the presented conclusions.

The thickness and relative permittivity of the chip layers are summarized in Table  . Following the standard HFSS library, silicon was taken to have a conductivity of 10 S m−1 while silicon dioxide and aluminum nitride were taken to be lossless dielectrics.

Table 1

Thickness and relative permittivity of the chip layers (see Figure 1e)

Material	Thickness [mm]	Relative permittivity
Silicon dioxide (SiO2)	0.011	4
Silicon (Si)	t	11.9
Aluminum nitride (AlN)	0.8	8.8

The central wavelength at 60 GHz is 5 mm in air and 1.7 mm in AlN. The ports were implemented as slot antennas through 200 µm × 300 µm apertures in the bottom metallic layer. Within the considered frequency band from 55 to 65 GHz, the ports were thus electrically small and their radiation properties were essentially frequency‐independent.

On‐Chip RIS Design

The designed on‐chip RIS consisted of a 5 × 5 array of meta‐pixels, each composed of a 2 × 2 group of programmable meta‐atoms operating around 60 GHz. The on‐chip RIS covered 3.3% of the chip package ceiling and roughly 1.5% of the total interior surface of the metallic chip package.

The design of the programmable meta‐atoms is shown in Figure 1f and based on typical mushroom structures loaded with varactor diodes. For simplicity, the programmability was limited to 1 bit (binary). The two effective capacitances of the varactor diodes (0.1 and 1 pF) were selected to be within the range of typical GaAs junction diodes currently available off‐the‐shelf that can operate up to at least 70 GHz. In the full‐wave simulations, losses for the varactor diodes were also included, assuming they had a quality factor of around 1000. In future experimental implementations, the programmable component of the meta‐atom may be integrated or fabricated onto the chip (instead of using packaged off‐the‐shelf components). Furthermore, the choice of programmable component is not limited to varactor diodes. PIN diodes or Schottky diodes as well as field‐effect transistors (FETs),[ ] including the case of thin‐film transistors, can also be used. Another option that works well at mmW and higher frequencies are meta‐atoms equipped with liquid crystals. A further possibility may consist in leveraging piezoelectric diaphragms to mechanically alter the chip package boundaries.[ ]

If off‐the‐shelf components are to be used in the meta‐atom design, it is critical that the latter allow one to incorporate the packaged varactor diodes. To that end, the meta‐atom size would have to increase relative to that presented in Figure 1f. To demonstrate that the use of packaged off‐the‐shelf varactors is possible, an alternative programmable meta‐atom that can include an off‐the‐shelf Macom varactor diode (MAVR‐000120‐1411) was designed. A schematic drawing of this design is presented in Figure  and shows that its size exceeds that of the meta‐pixels from Figure 1. Again, one‐bit programmability was considered. Here, the capacitance values for the two meta‐atom states were 0.45 and 0.55 pF; this small ratio between the two capacitance values makes their implementation in practice easier. To confirm that this alternative on‐chip RIS design (compatible with an off‐the‐shelf varactor diode) is also efficient at parametrizing the on‐chip wireless channels, each meta‐pixel in Figure 1 was replaced with one of the alternative meta‐atoms in order to repeat the in situ characterization from Figure 3c,d. The result in Figure 7b shows clear variations of the wireless channel for random configurations of the alternative on‐chip RIS.

Figure 7

Alternative on‐chip RIS design with an off‐the‐shelf packaged varactor diode. a) Design outline. b) In situ characterization akin to Figure 3d.

The refresh rate of such a programmable metasurface could reach at least 50 kHz with carefully designed electronic control circuitry, as evidenced by existing experimental RIS prototypes in the 2.4 GHz regime.[ ] However, the envisioned WNoC application might not require very fast switching between RIS configurations because the goal is to establish an over‐the‐air‐equalized channel between cores so that the cores can exchange large amounts of information wirelessly. Switching would occur on a per‐application basis or a per‐application‐phase basis, implying that the metasurface would only need to be updated at a millisecond scale.

Finally, moving toward experimental realizations, the biasing network would have to be included. For the considered programmable metasurface design, biasing circuitry can be incorporated by extending the vias beyond the ground plane. By including a narrow annular ring around the vias, it can be ensured that the DC voltage of the central conductor is different from that of the surrounding conductor. To ensure that the DC and RF signals are decoupled, radial stubs can be included at the end of the via to act as RF chokes. The interested reader may refer to existing literature on experimentally realized programmable metasurface prototypes (e.g., refs. [79, 96, 97]); incidentally, these works suggest that biasing lines are not expected to severely impact the performance, and refined meta‐atom designs taking the biasing lines into account can certainly be conceived. As explained in Section 3, the generic proposal for shaping CIRs does not depend on the specific RIS design.

Determination of RIS Configuration

The cost function that is to be maximized was defined as the ratio of the signal intensity in the strongest tap of the CIR to the total signal intensity: where t 0 is the peak time and Δt is the width of the strongest CIR tap.

Identifying a RIS configuration that maximizes was a non‐trivial task because i) due to the rich‐scattering geometry of the chip enclosure no analytical forward model exists that maps a given to the corresponding CIR h(t); and ii) the limitation to binary RIS configurations is not compatible with standard gradient‐descent optimization. Surrogate forward models could be learned if enough labeled training data was available.[ ] Here, the alternative route of using the simple iterative Algorithm 1 similar to those used, for example, in refs. [29, 70], was chosen.

In the first step, was evaluated for 32 random RIS configurations and the best one was identified. The latter then served as starting point for an iterative search. Therein, at every iteration the configuration of one RIS element was flipped to check if increased, in which case the change was kept. The algorithm looped two times over each pixel because reverberation induces long‐range correlations between the optimal configurations of individual RIS elements. Each evaluation of for a new RIS configuration required a new full‐wave simulation to obtain the corresponding CIR. The detailed optimization dynamics of Algorithm 1 are illustrated for the case of Figure 4 in Figure  .

OOK Modulation Scheme

In this section, the procedure to simulate an OOK modulation scheme is detailed. A high‐level overview is provided in Algorithm 2. Based on the frequency‐dependent channel S 12( f) obtained from the full‐wave simulations, the linearity of the wave equation was leveraged to faithfully emulate the transfer of information with OOK, that is, binary amplitude‐shift keying (BASK). The stream of N bits that was intended to be transferred was a 1 × N vector . The ith entry of is denoted by in the following.

First, the transmitted signal s TX(t) was created by modulating the amplitude of a sinusoidal carrier at f 0 = 60 GHz with the data stream for a given choice of bit duration τ:

The modulation speed was hence 1/τ samples per second. The carrier amplitude a determined the transmitted power P t = 10 log10((a/2)2/10−3) dBm, assuming both symbols are equiprobable. s TX(t) was strongly oversampled (at 1.1 × 1012 Hz = 18.5f 0) to avoid sampling artefacts.

Second, the received signal s RX(t) was determined. To that end, s TX(t) was Fourier transformed, yielding S TX( f). Then, S TX( f) was multiplied with the channel S 12( f) to obtain S RX( f) = S 12( f)S TX( f). The received signal s RX(t) was subsequently obtained as the real part of the inverse Fourier transform of S RX( f). This procedure is equivalent to convoluting s TX(t) with the CIR h 12(t) in the time domain. Moreover, Gaussian noise n(t) with zero mean and standard deviation χ was added to the received signal. This emulated thermal noise at the receiver that was independent of the received signal; the noise power was consequently P n = 10 log10(χ2/10−3) dBm.

Third, the signal s RX(t) at the receiver was sampled and quantized to obtain the received signal stream . Specifically, s RX(t) was divided into intervals of length τ which were shifted with respect to the transmitted signal by the propagation delay Δpd associated with the first arriving pulse. Then, energy detection was implemented by integrating over each interval, yielding a 1 × N vector of detected energies .

Next, each entry of was compared to a threshold value d thresh and “1” was assigned if the value was above the threshold, and “0” otherwise. This finally yielded the decoded data stream . The threshold was identified as the energy value that minimized the BER, evaluated over a long series of random symbols.

In practice, because N was large, the above‐detailed OOK simulation procedure was performed for shorter subsections of , one after the other. In order to not distort ISI effects through this procedural detail, each subsection began with the last three bits of the previous subsection.

In order to evaluate the BER, a random binary data stream with N = 2.28 × 105 symbols of equal probability was used, that is, = 0.5.

In order to transfer an A × B full‐color image via the wireless channel, the 3D matrix representing it (two spatial dimensions, one dimensions for the three RGB color components) was first flattened, yielding a 1 × 3AB vector. Then, each 8‐bit entry of this vector was replaced with its corresponding binary representation, yielding a 1 × 24AB vector. This bit stream was then transferred via the wireless channel following the previously outlined procedure. The received signal was ultimately assembled based on the received and decoded data stream of equal length by performing the procedure outlined in this paragraph in reverse order.

Data Processing Details

In this section, the data processing steps underlying each display item that does not directly show raw data are summarized.

Figure  , top left inset. The data points are the average of |S 12| over all considered frequency points (see top right inset) and the three considered wireless channels (see Figure 1a for transceiver locations).

Figure  . The colored lines plot the standard deviation of the complex valued S 12 parameter across 32 random RIS configurations. The 32 corresponding raw S 12 data are shown (magnitude only) in Figure 3c. The black line in Figure 3d is the average of the three colored lines.

Figure  , black line. The black line is the average over the 32 real‐valued CIR curves plotted in orange/red in Figure 4a.

Figure . The black lines in Figure 5a,b, Figure 5c,d, and Figure 5e,f are the average over the 32 real‐valued CIR curves plotted in orange/red in Figure 5a, Figure 5c, and Figure 5e, respectively.

Figure  . The raw BER values (dots) are based on 2.28 × 105 symbols, as detailed in the Section 8. The continuous lines smooth the raw BER curves plotted as a function of modulation speed. The smoothing is based on a moving average filter spanning 15 values of modulation speed. The transferred images were obtained following the procedure detailed in the previous subsection titled “OOK Modulation Scheme”.

Figure  . The black line plots the standard deviation of the complex‐valued S 12 parameter for the TX‐RX3 wireless link across 32 random RIS configurations.

Conflict of Interest

The authors declare no conflict of interest.

Code Availability

Code that supports the findings of this study is available from the corresponding author upon reasonable request.

Author Contributions

P.d.H. conceived the project. M.F.I. designed the meta‐atoms and optimized the RIS configurations, with input from S.A. and P.d.H. P.d.H. performed the OOK simulations, with input from M.F.I. and S.A. P.d.H. wrote the manuscript. All authors contributed with thorough discussions and reviewed the manuscript.

Supporting Information

Click here for additional data file.

Algorithm 1: Binary RIS optimization for on‐chip over‐the‐air equalization

Algorithm 2: OOK data transfer simulation (high level overview)