| Literature DB >> 33920302 |
Hai-Thai Nguyen1, Yen Nguyen2, Yen-Hsun Su1, Ya-Ping Hsieh3, Mario Hofmann2.
Abstract
Lateral tunnel junctions are fundamental building blocks for molecular electronics and novel sensors, but current fabrication approaches achieve device yields below 10%, which limits their appeal for circuit integration and large-scale application. We here demonstrate a new approach to reliably form nanometer-sized gaps between electrodes with high precision and unprecedented control. This advance in nanogap production is enabled by the unique properties of 2D materials-based contacts. The large difference in reactivity of 2D materials' edges compared to their basal plane results in a sequential removal of atoms from the contact perimeter. The resulting trimming of exposed graphene edges in a remote hydrogen plasma proceeds at speeds of less than 1 nm per minute, permitting accurate control of the nanogap dimension through the etching process. Carrier transport measurements reveal the high quality of the nanogap, thus-produced tunnel junctions with a 97% yield rate, which represents a tenfold increase in productivity compared to previous reports. Moreover, 70% of tunnel junctions fall within a nanogap range of only 0.5 nm, representing an unprecedented uniformity in dimension. The presented edge-trimming approach enables the conformal narrowing of gaps and produces novel one-dimensional nano-trench geometries that can sustain larger tunneling currents than conventional 0D nano-junctions. Finally, the potential of our approach for future electronics was demonstrated by the realization of an atom-based memory.Entities:
Keywords: 2D materials; break junctions; nanogap; tunneling devices
Year: 2021 PMID: 33920302 PMCID: PMC8070335 DOI: 10.3390/nano11040981
Source DB: PubMed Journal: Nanomaterials (Basel) ISSN: 2079-4991 Impact factor: 5.076
Figure 1Method to producing lateral tunneling junctions. (a) Sequence of lithography steps to produce an edge-contacted 2D material prior to edge trimming (graphene transfer, photolithographic channel definition and isolation, edge contact deposition, lithographical protection of one contact); (b) depiction of the remote plasma chamber and close-up schematic of edge trimming between the metal contact and graphene edge; (c) schematic of the edge-trimming process that results in nanogaps between graphene and the edge contact; (d) scanning electron micrograph of produced structure with the indication of gap position.
Figure 2Carrier transport measurement of representative nanogap after 65s etching. (a) Atomic force micrograph of graphene/contact interface; (b) representative IV at room temperature; (c) FN-plot of IV at different temperatures; (d) current at a fixed voltage (0.2 V) vs. temperature.
Figure 3Characterization of the etching process. (a) IV for the same tunnel junction at different etching times; (b) extracted tunneling gap size from (a) as a function of etching time with overlay of previously observed edge-trimming rate Xie et al. [27]; (c) comparison of current-voltage characteristics for two different lateral gap widths but the same gap size.
Figure 4Scalability of nanogap formation approach and applications. (a) Overlay of 30 IVs obtained from one sample with the indication of status; (b) histogram of gap sizes throughout the sample indicating that 70% of devices exhibit gaps within a 0.5 nm range, (inset) photograph of sample; (c) realization of atomic-scale memory showing distinct IV before and after writing step, (inset) tunneling mechanism in pristine and set cases; (d) FN plots of pristine and set memory states, (inset) depiction of set state.