Literature DB >> 27038143

High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.

Yuan Liu1, Jiming Sheng1, Hao Wu1, Qiyuan He2, Hung-Chieh Cheng1, Muhammad Imran Shakir3, Yu Huang1, Xiangfeng Duan2.   

Abstract

Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2) . This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures.
© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Entities:  

Keywords:  graphene; graphene-silicon junctions; high current density; tunneling transistors; vertical transistors

Year:  2016        PMID: 27038143     DOI: 10.1002/adma.201506173

Source DB:  PubMed          Journal:  Adv Mater        ISSN: 0935-9648            Impact factor:   30.849


  1 in total

1.  Edge-Trimmed Nanogaps in 2D Materials for Robust, Scalable, and Tunable Lateral Tunnel Junctions.

Authors:  Hai-Thai Nguyen; Yen Nguyen; Yen-Hsun Su; Ya-Ping Hsieh; Mario Hofmann
Journal:  Nanomaterials (Basel)       Date:  2021-04-10       Impact factor: 5.076

  1 in total

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