A miniaturized multi-clamp CMOS amplifier for intracellular neural recording.

Intracellular electrophysiology is a foundational method in neuroscience and uses electrolyte-filled glass electrodes and benchtop amplifiers to measure and control transmembrane voltages and currents. Commercial amplifiers perform such recordings with high signal-to-noise ratios (SNRs) but are often expensive, bulky, and not easily scalable to many channels due to reliance on board-level integration of discrete components. Here, we present a monolithic complementary-metal-oxide-semiconductor (CMOS) multi-clamp amplifier integrated circuit capable of recording both voltages and currents with performance exceeding that of commercial benchtop instrumentation. Miniaturization enables high-bandwidth current mirroring, facilitating the synthesis of large-valued active resistors with lower noise than their passive equivalents. This enables the realization of compensation modules that can account for a wide range of electrode impedances. We validate the amplifier's operation electrically, in primary neuronal cultures, and in acute slices, using both high-impedance sharp and patch electrodes. This work provides a solution for low-cost, high-performance and scalable multi-clamp amplifiers.

Intracellular electrophysiological recordings from neurons is a high-fidelity neuroscience technique that enables fundamental understanding of neuronal computation and function[1]. These recordings are typically performed using electrolyte-filled glass pipettes in either whole-cell[1] or sharp electrode[2] configurations. Pipettes used in the whole-cell configuration typically have diameters on the order of a few micrometres and impedances on the order of a few megaohms. In this configuration, the pipette tip is positioned close to the cell such that it first forms a loose seal with the membrane – commonly referred to as the “cell-attached” configuration. Upon subsequent application of suction, the tip-membrane interface forms a giga-seal[1], and any further increase in the suction ruptures the membrane yielding full intracellular access. The whole-cell technique is the current gold-standard and results in precise measurement of intracellular currents and voltages. Alternatively, sharp electrodes have diameters on the scale of a few nanometres and impedances on the order of 100 MΩ and are used to impale the membrane to gain intracellular access for accurate voltage measurements. An amplifier connected to the pipette is used to control the current through the pipette and record the membrane voltage (current-clamp, CC) or control the voltage in the membrane and record the membrane current (voltage-clamp, VC). CC allows us to measure the voltage response of a cell to electrochemical stimuli. VC, on the other hand, can be used to determine the composition and concentration of voltage sensitive ion channels in the membrane, which has significant implications, for example, in drug discovery.

Recording these μV-to-mV-scale voltages and pA-to-nA-scale currents necessitates the use of precision low-noise instrumentation amplifiers. The recordings are further complicated by the series resistance (R) and capacitance (C) of the pipette which, in the best case, distort the recordings and, in the worst case, lead to a complete loss of clamping ability. The amplifier is hence also required to have associated compensation circuitry to account for these non-idealities in the pipette. Benchtop amplifiers, such as the Axopatch 200B[3] and the Axopatch 700B[4], perform these recordings with high signal-to-noise ratio (SNR)[4]. However, they use discrete components in their design, increasing the cost, weight, and associated wiring parasitics of these systems which consequently limits their bandwidth, scalability, power efficiency, and performance. Integrated-circuit- (IC-) based solutions can address these problems but have been difficult to realize owing to the large resistance values required in these designs, the resulting limits in dynamic range, and the limited ability to compensate for electrode non-idealities[5-10]. Non-linear elements in feedback can be used to overcome these challenges[11]. However, these elements are extremely sensitive to variations in manufacturing and temperature, which introduce distortions in the recorded data and require additional calibration circuits to account for these errors.

In this Article, we present a custom IC fabricated in a commercial complementary metal-oxide-semiconductor (CMOS) process that can perform both VC and CC while overcoming many of the limitations of prior efforts. The chip includes compensation and stimulation circuitry that uses negative feedback and transistors operating in the subthreshold regime to realize large resistances. This allows us to shrink a state-of-the-art electrophysiology amplifier to an area of < 9 mm2 while consuming only 7 mW of power, several orders of magnitude lower than commercial benchtop systems. Further, compared to previous efforts at multi-clamp ICs that were designed for use specifically with patch pipettes[10,11], our amplifier can also be used with high-impedance sharp microelectrodes because of extended resistance and capacitance compensation ranges and features a digitally programmable shared input that allows for switching between CC and VC.

DESIGN CONSIDERATIONS

Fig. 1a shows an illustration of a typical experiment for recording intracellular signals from a neuron and a block diagram of the associated electronics. CC fundamentally consists of a voltage buffer with a high-impedance input and typically unity gain. In the special case where the current being injected in (I) is zero, the only extra circuitry required is that necessary to compensate for C, which acts in conjunction with R to filter the measured signal. C is typically of the order of a few pF and is governed by the pipette geometry and insertion depth. However, I is generally not zero and must be programmable in the pA – nA range. The programmability is generally achieved by varying an externally applied command voltage (V). When a current is being injected, R introduces a proportional offset voltage in the measurement. If R is determined accurately prior to the experiment and is assumed to remain unchanged, this offset is easily subtracted.

Figure 1.

Miniaturized multi-clamp amplifier. (a) Typical measurement setup for neuronal intracellular recordings. The measurement is performed in either voltage- or current-clamp modes and requires different modules depending on the mode. (b) Circuit schematic of the current-clamp showing the implementation of the voltage buffer, C compensation circuitry and current injection circuitry. (c) Transistor-level circuit schematic of the rail-to-rail input, rail-to-rail output OTA used in this design. (d) Circuit schematic of the voltage-clamp showing the implementation of the TIA, C compensation circuitry and R compensation circuitry. (e) Die photograph of the amplifier IC. The chip measures 3.225 mm × 2.725 mm. (f) Photograph of the chip assembled on a PCB. The PCB measures 1.4” × 2”. (g) Photograph of a patch pipette contacting a neuron as seen from a microscope. (h) Photograph of the measurement setup consisting of the microscope, manipulator and the amplifier. The headstage contains all the analog components while the motherboard digitizes the analog outputs of the headstage and transmits them to a host computer (not shown).

In the absence of R, VC is achieved using a current-to-voltage converter, also known as a transimpedance amplifier (TIA), that ensures that the pipette voltage (V) equals V[12,13]. However, as previously noted, R is typically several 10’s of MΩ for patch pipettes[14] and can be several hundreds of MΩ for sharp microelectrodes[15,16]. Signal currents, which are typically in the pA – nA range, flow through this R and can cause mV-scale errors in the clamp voltage. In addition, R in combination with the membrane capacitance, C, filters the signal of interest. Hence, dedicated circuits must compensate for R. C compensation is required in order to accurately determine the signal current, which is imperative for stable R compensation[17].

Current-clamp

Fig. 1b shows a detailed schematic of the CC block consisting of a unity gain voltage buffer, C compensation circuitry, and current injection circuitry. The voltage buffer with unity gain is implemented as an operational amplifier (op-amp) in negative feedback. The buffer must have low input leakage current so as to allow for voltage recordings with I = 0. Hence, the op-amp is designed with thick-oxide metal-oxide-semiconductor field effect transistor (MOSFET) inputs to ensure that the input leakage current is < 10 fA [18]. Fig. 1c shows a transistor-level schematic of the op-amp used in this design. The first stage consists of a dual n- and p-input folded cascode followed by a common-source second stage. The dual inputs enable rail-to-rail input swing while the common-source second stage allows for rail-to-rail output swing. The required bias voltages are generated in a separate biasing block.

C compensation is important for CC in order to measure voltage signals at the highest possible bandwidth. For a voltage signal V generated in the cell membrane, in the absence of C compensation, the voltage recorded by the buffer will be V filtered by R and C. For a patch pipette with R = 25 MΩ and C = 5 pF, this sets the 3-dB bandwidth for the recording at 1.27 kHz. For sharp microelectrodes with higher R and C, this gets proportionately worse. We achieve C compensation by multiplying the recorded voltage V by a programmable factor A (1 < A < 2) and connecting this back to the input through a programmable capacitor C. The current injected back in is then . We implement A using an op-amp as a non-inverting amplifier with programmable feedback resistance that gives 10-bits of resolution (see Section 1 in the Supplementary Information for details). C is selectable between 0, 5, 10 and 15 pF. The compensation step-size of C/1024 depends on the value of C selected and is less than 5 fF when the 5 pF capacitor is selected.

Current injection is frequently used as a stimulus to characterize the voltage response of the cell[1]. Considering that the membrane resistance of the cell, R, is several 10’s of MΩ or larger, the output impedance of the current injection block needs to be at least an order of magnitude larger than this so as to not add substantial amount of leakage current. We implement the current injection circuitry using transistors in the subthreshold regime as active current dividers as shown in Fig. 1b [9,19]. The external V is first converted into a proportional current through a fixed on-chip resistor R (nominally 100 kΩ). This current is then passed through two stages of 32× current division to yield a net transconductance of 1024 × 100 kΩ ≈ 100 MΩ. Ratioed capacitors in parallel with the subthreshold transistors (not shown in figure) extend the operating bandwidth of the current injection. A large value for the effective injection resistance is desirable in order to reduce its current noise contribution but places limits on the largest current that can be injected. The active current division utilized here serves to decrease the thermal noise of R by a factor of N2 such that the input-referred noise contribution of R is then equivalent to that of a passive resistor of value ≈ 100 GΩ [9,19].

Voltage-clamp

Fig. 1d shows a detailed schematic of the VC block consisting of the TIA, the C compensation circuitry and the R compensation circuitry. The TIA achieves current amplification using similar principles to those employed in the CC current injection block for current division [20]. After two such stages provide a net current amplification of 1024×, the current is linearly converted into a proportional output voltage using a transimpedance stage with resistive feedback. We note that while the current-to-voltage conversion in each of the current-amplifying stages is non-linear, the op-amp ensures that corresponding sets of unit-sized transistors experience the same gate-source and drain-source voltages such that the ratio of their currents is primarily determined by the ratio of the number of devices connected between the output and the following stage to the number of devices in feedback around the op-amp, which is 32 in each of the stages in this design. Additional ratioed capacitors in parallel with the subthreshold transistors (not shown in the figure) extend the amplification bandwidth and ensure closed-loop stability for the op-amps. The feedback resistance in the output TIA stage is four-bit programmable from 0 – 225 kΩ. For large transient input currents, the output voltage of a TIA with a fixed value of feedback resistance will saturate and could lead to temporary loss of feedback. We use anti-parallel diodes in parallel with the transimpedance resistor (R) in our design to ensure that closed-loop feedback is maintained even for large input currents at the expense of limiting the linear range of the TIA. The effective transimpedance gain of the TIA is R = N2R. We note that it is possible to invert the diode’s non-linear I-V relationship to extend the dynamic range of our TIA, but this was not implemented in this work[11].

Another crucial advantage of our TIA is the large operating bandwidth. Traditional TIAs implemented with a large passive resistor as the feedback element are limited in bandwidth by the capacitor required in parallel with the resistor to ensure stability. For example, a 100 MΩ resistor in parallel with a 1 pF feedback capacitor limits the TIA bandwidth to 1.6 kHz. In contrast, the feedback capacitor in the feedback path of the transimpedance stage in our design appears across R. Since this is 1024× smaller than the effective value of the feedback resistance, the corresponding improvement in bandwidth is 1024×. For example, this resistor would be set to 100 kΩ in order to realize R ≈ 100 MΩ yielding a cutoff frequency of ≈ 1.6 MHz. In practice, however, this improvement is limited by the bandwidth of the preceding current amplification stages.

C compensation in VC is essential in order to be able to perform R compensation. In a typical VC experiment, V is stepped from its initial value at the resting membrane potential to a different value. Since the TIA will ensure that this step is also applied at the electrode connected to the pipette, the resultant current measured by the TIA will be a combination of the desired current through the pipette and the charging current required for changing the potential across C. We use a replica of the C compensation block used as part of CC to cancel out the latter contribution.

Lack of R compensation would lead to three primary deviations from the desired VC behavior[3]. First, a step change in V results in a change in the membrane potential (V) with an exponential time constant determined by R. Second, a current I flowing through R will cause V to deviate from V by I. Lastly, any signal current will be low-pass filtered with a time constant given by R. In a typical VC experiment in whole-cell configuration with R = 25 MΩ and C = 30 pF, this would set the 3-dB cutoff of this filter at 212 Hz. 90% compensation of this R can increase the measurement bandwidth by 10× to 2.12 kHz.

To mitigate these deleterious effects, our design includes R compensation circuitry based on state estimator theory[21]. In short, we estimate V as V = V − I where I is the current flowing through R, once C has been compensated, and R is the local estimate of R. We exploit CMOS matching techniques in order to feed an accurate copy of the current sensed by the TIA to the R compensation circuitry, which, in essence, is a TIA itself with ten-bit programmable feedback resistance from 0 to 256 kΩ. Combined with the 1024× amplification in the current domain, this allows us to tune the value of R up to 262 MΩ. The V thus generated is then forced to equal an off-chip V using negative feedback provided by an integrator implemented using a five-bit programmable transconductance block and a fixed 64-pF capacitor. Additional programmable low-pass filters are included to help stabilize the overall loop. Achieving > 75% R compensation is challenging[21], since I must be measured accurately at high bandwidths, typically exceeding 100 kHz. The circuitry used for measuring I and generating V is similar to that used in the TIA and enjoys the same bandwidth benefits. Further, depending on the cell membrane capacitance, our implementation allows for potentially compensating 100% of R (see Sections 2 and 3 in the Supplementary Information for details).

ELECTRICAL CHARACTERIZATION

Fig. 1e shows a die photograph of the 3.225 mm × 2.725 mm amplifier chip as manufactured in a 0.18 μm bulk CMOS process. The die is directly mounted on, and wirebonded to, a 1.4” × 2” custom-designed printed circuit board (PCB). The die is then encapsulated with an epoxy (see Methods) in order to mechanically protect the wirebonds (Fig. 1f). A connector is included in order to connect to conventional pipette holders for use in patch experiments (Fig. 1g). Finally, the aluminum enclosure for the PCB is designed in order to maintain compatibility with systems designed for commercial multi-clamp systems (Fig. 1h).

We first validated CC and VC functionality by using an electrical model cell as shown in Figs. 1b and 1d comprising of R = 100 MΩ, R = 100 MΩ and C = 20 pF for VC testing, and R = 0 for CC testing, unless noted otherwise. C is largely determined by the parasitic trace capacitance to ground on the PCB. We first determined the noise performance of the CC voltage buffer alone. Fig. 2a shows an example output time trace for a DC voltage source connected to the input, filtered to different bandwidths after acquisition, and Fig. 2b shows the corresponding input-referred voltage noise power spectral density (PSD) of the unfiltered time trace. In a 10-kHz bandwidth, the root-mean-square (RMS) value of the input-referred voltage noise is 20 μVRMS and is dominated by the noise from on-PCB components. This yields an acceptable SNR for recording extracellular action potentials and offers comparable performance to commercial instruments and previous integrated efforts (see Table 1).

Figure 2.

Amplifier electrical characterization. (a) Concatenated 200-ms time trace and (b) input-referred noise PSD of an open-headstage measurement of the CC voltage buffer. The input is connected to a filtered 1.65 V source. (c) A 10 mVpp square wave applied at V of the CC current injection circuit generates a 10.1 mVpp amplitude square wave when the current is injected through an R 100 MΩ indicating that the effective injection resistance is ≈ 100 MΩ. When C compensation is off, the injected current is low-pass filtered by the parasitic C in parallel with R resulting in slow rise and fall times in the square wave. With C compensation turned on, the rise and fall times are reduced considerably. (d) Concatenated 200-ms time trace and (e) input-referred noise PSD of an open-headstage measurement of the VC TIA. The TIA offers significantly lower noise than an Axopatch 200B (R = 500 MΩ). (f) With a 10 mVpp square wave applied at V of the VC TIA, the measured current shows spikes due to the charging currents required to change the voltage across C. When C compensation is turned on, the spikes disappear completely from the recorded current. (g) With R = R = 100 MΩ and C = 20 pF, without R compensation, the recorded current varies from −250 pA to +250 pA as V is stepped from −50 mV to +50 mV in steps of 5 mV. When R compensation is enabled to remove ≈ 83 MΩ of R, the amplitude of the recorded current increases and varies from −425 pA to +425 pA for the same waveform applied at V. The larger spikes at the onset of each transition in V reflect the increased charging currents through C which are a consequence of the reduced value of R.

Table 1:

Comparison to state-of-the-art

	MultiClamp 700B[4a]	Goldstein et al.[10]	Harrison et al.[11]	This work
Type	Discrete	IC	IC	IC
Technology	-	0.5 μm SoS	0.35 μm CMOS	0.18 μm CMOS
Die size	-	4 mm × 8 mm	4.7 mm × 3.0 mm	3.23 mm × 2.73 mm
Supply voltage	-	3.3 V	-	3.3 V
Power consumption	30 W[b]	30 mW[c]	-	7 mW
Cp compensation range	0 – 36 pF (VC)−8 – 16 pF (CC)	0 – 10 pF	0 – 10 pF	0 – 15 pF
Input-referred voltage noise in CC	-	150 μVRMS in 5 kHz	8.2 μVRMS in 10 kHz	20 μVRMS in 10 kHz
VC TIA gain	50 MΩ - 50 GΩ	49 kΩ - 100 MΩ	Non-linear[d]	0 – 225 MΩ
Input-referred current noise in VC (in 5 kHz)	0.8 pARMS	3.3 pARMS	1.1 pARMS	0.23 pARMS
Rs compensation scheme	Positive feedback	Positive feedback	Positive feedback	Negative feedback
Rs compensation range	0.4 – 744.7 MΩ	0 – 100 MΩ	0 – 32 MΩ	0 – 262 MΩ

Values reported for R = 500 MΩ.

The MultiClamp 700B contains several peripheral circuits for enabling industry-standard functionality. The power reported here includes that consumed by these circuits as well.

Per channel power consumption. The chip contains 4 independent channels.

A diode is used as the transimpedance element.

Fig. 2c shows the voltage recorded by the buffer (with and without capacitance compensation) for a 10-mVpp-amplitude square wave at 2 Hz applied to V in order to inject a current square wave with a nominal amplitude of 100 pApp into R. The recorded amplitude of 10.1 mVpp for the square wave indicates that the injected current is 10.1 mVpp/100 MΩ = 101 pApp. Without capacitance compensation, the injected current is filtered by the parallel combination of R and C and consequently, the measured voltage signal exhibits 10%-90% rise and fall times of ≈ 2.4 ms. We then tuned the C compensation to speed up the rising and falling edges of the transitions. With both current injection and capacitance compensation on simultaneously, we observe rise and fall times of less than 100 μs, significantly faster than the case without C compensation. C compensation operates identically to a voltage applied at V instead of V (see Section 4 in the Supplementary Information for details).

After characterizing the frequency response and linearity of the TIA (see Sections 5 and 6 in the Supplementary Information for details), we determined the noise performance of the TIA. In VC mode, the current measured by the TIA is given by I = (V − V)/R (Fig. 1d). With R set to ≈ 225 MΩ, Fig. 2d plots the time trace of I for a constant externally applied V filtered to different bandwidths in software and Fig. 2e plots the corresponding PSD. Fig. 2e also shows the input-referred noise PSD for an Axopatch 200B (Molecular Devices) with R set to 500 MΩ, the current commercial state-of-the-art for low-noise ion channel recordings. Our TIA generates only 225 fARMS of noise when filtered using a fourth-order 5 kHz Bessel filter. This is a factor of three better than the Axopatch 200B. Further, this is the lowest reported noise among all integrated multi-clamp efforts (see Table 1 and Section 7 in the Supplementary Information).

Fig. 2f shows the current recorded by the TIA (filtered to 10 kHz bandwidth) with and without C compensation for 1-Hz, 10-mVpp steps in V. Prior to enabling C compensation, the current waveform has large transient spikes at the onset of each step change in V due to the charging currents associated with changing the potential suddenly across the parasitic C. When tuned correctly, the transient charging currents can be removed completely from the recorded current. In our setup, we tuned the compensation circuitry to remove ≈ 2 pF of parasitic capacitance.

After completely eliminating the effect of C, we tested the functionality of the R compensation circuitry with R set to 60 MΩ and the compensation tuned to reduce R by 83 MΩ. We ramped V from −50 mV to +50 mV in steps of 5 mV and measured the current recorded by the TIA (Fig. 2g). In the absence of R compensation, the TIA applies this waveform across R + R resulting in the current varying from −250 pA to 250 pA in steps of 25 pA. Enabling R compensation increases the amplitude of the current step to 42.5 pA yielding an effective R of ≈ 17 MΩ, indicating that the R compensation circuit was successful in cancelling over 80% of the original R as expected. The spikes at the onset of each transition shown in Fig. 2g are more pronounced when R compensation is enabled. As the effective value of R decreases because of active compensation, the voltage applied across C more closely resembles the desired ideal step and results in larger charging currents. If the value of C is of the order of tens of fF, it is possible to completely compensate for R (see Section 3 in the Supplementary Information for details).

IN VITRO CHARACTERIZATION IN CULTURES AND SLICES

To validate the amplifier’s functionality for neuronal measurements in both cultures and slices, we enclosed the PCB containing the IC in an aluminum box that acted as a Faraday cage. We then mounted this box on a manipulator housed within a custom-designed microscope setup (Fig. 1h). We first characterized R and C of sharp microelectrodes for use in CC mode by injecting a 2-Hz, 100-pApp signal into the electrode. Fig. 3a shows a typical voltage response obtained with a 100-nm high-impedance sharp microelectrode (3 M KCl filling solution[22]) immersed in a bath containing artificial cerebrospinal fluid (ACSF) with the C compensation circuitry tuned to cancel 8 pF of parasitic capacitance. The response (filtered to 4 kHz) indicates a measured resistance of 90 MΩ with slight C overcompensation. We then used this electrode to perform intra- as well as extracellular recordings from cortical layer-5 pyramidal neurons in acute slices (see Methods for details). We observed a resting membrane potential of −58 mV, and distinct extracellular (prior to cell entry) and intracellular neuronal action potentials with high SNR, millisecond time-scales, and ~50-mV amplitudes as shown in Figs. 3b and 3c. We also performed recordings using the MultiClamp 700B (Molecular Devices), which is a widely used high-performance commercial multi-clamp amplifier. Our recordings compare favorably to those made using the MultiClamp 700B (spike-triggered average of 11 action potentials, Fig. 3d) in terms of SNR, timescales and signal fidelity.

Figure 3.

In vitro recordings using sharp microelectrodes. (a) Injecting a 100 pApp current through a sharp microelectrode with slight C overcompensation yields a measured voltage square wave with an amplitude of 9 mVpp indicating that the pipette resistance is ≈ 90 MΩ. (b) Extracellular and (c) intracellular action potentials recorded from a neuron using the sharp microelectrode characterized in (a). (d) Spike-triggered average of 11 action potentials recorded using a MultiClamp 700B reveals that the recordings in (c) show similar SNR, amplitudes and timescales as those performed using the 700B.

In VC mode, a periodic pulse with an amplitude of 5 mV and frequency of 1 Hz is applied to determine the pipette’s resistance prior to cell entry. The pipettes we tested in this work had resistances ranging from 7 to 14 MΩ. Fig. 4a shows the current recording (filtered to 1 kHz bandwidth) through one such pipette in the bath, as it approaches the cell in 3-D cultures (see Methods for details) and after formation of the giga-seal. In the cell-attached configuration (loose-seal; seal resistance ~ 150-200 MΩ), we held the pipette at −70 mV and observed several spontaneous action potentials as shown in Fig. 4b (filtered to 2-kHz bandwidth). In a separate experiment, we were able to observe spontaneous action potentials in CC as well (Fig. 4c, filtered to 10-kHz bandwidth). Current was injected to maintain ≈ -50 mV in the pipette. The signals are characterized by high SNR biphasic waveforms and amplitudes of several mV indicating that these were tightly-coupled extracellular action potentials due to incomplete rupture[23,24]. Upon rupturing the membrane further, and when filtered to 2-kHz bandwidth, we were also able to observe excitatory and inhibitory postsynaptic potentials (Fig. 4d).

Figure 4.

In vitro recordings using patch pipettes. (a) With a 5 mV square wave applied at V, the current recorded by the TIA is maximum when the pipette is in the bath and decreases as the pipette approaches the cell and suction is applied. When the giga-seal is formed, there is negligible DC current flowing through the pipette. (b) Loose-seal VC recording from a neuron shows several spontaneous action potentials over the course of several seconds of recording. The zoomed-in trace reveals high SNR and millisecond timescales. (c) Tight-seal recordings of action potentials, (d) EPSPs and IPSPs from a neuron in CC.

CONCLUSION

We have presented a miniaturized multi-functional CMOS amplifier chip with complete VC and CC capabilities. In doing so, we leveraged the advantages afforded by modern commercial CMOS processes to shrink a benchtop system down to an area of < 9 mm2. In vitro, the amplifier was able to record signals with high fidelity in both VC and CC modes. Comparison with previous work shown in Table 1 shows that our system consumes the least amount of power while offering performance equalling or exceeding that of benchtop systems.

Although we have reported a single-channel system here, this approach allows scale-up of the design to support either multiple channels on the same chip or multiple chips on the same PCB. This could open up experiments previously rendered infeasible by the physical form factor of the headstages of commercial recording systems. Further, the use of a standard fabrication process allows the cost of these systems to be driven down substantially.

METHODS

Amplifier chip fabrication and packaging

The amplifier chip was designed in a commercial 0.18-μm CMOS process. The chip was directly wirebonded to the PCB. This approach eliminates the standard package-socket interface and helped reduce parasitics at the input nodes. The chip was attached to the PCB using Epo-Tek H20E (Epoxy Technology) and the landing pads on the PCB were then cleaned by immersion in BPS-106 (Versum Materials) for 10 minutes prior to wirebonding. After the wirebonding was complete, the chip was encapsulated using Epo-Tek OG116-31 (Epoxy Technology) to protect the wirebonds from damage during handling.

The PCB consists of the bias current sources required by the chip, digital-to-analog converters (DACs) to generate the various control voltages and analog voltage buffers. This PCB was connected via flexible ribbon cables to another PCB that houses the anti-aliasing filters (four-pole, 100-kHz, Bessel), analog-to-digital converter (ADC, six-channel, 16-bit) and digital isolators. A field programmable gate array (FPGA) was then used to transfer the digitized data to a host PC over a standard USB 2.0 interface. We also developed a custom GUI for controlling the amplifier chip and visualizing the data. All software running on the host PC was written in Python using the PyQt design framework, which allowed for cross-platform operation.

2D and 3D Cell culture preparation

Animal handling and experimentation were done according to US National Institutes of Health and approved by the Institutional Animal Care and Use Committees of Columbia University. Following standard procedures with minor modifications[25,26], hippocampal neuronal cultures were generated from E19 mice. Briefly, pregnant mouse were anesthetized and euthanized by cervical dislocation. Hippocampus were dissected in Hibernate E (Gibco) ice cold media and subsequently incubated in 0.25% Trypsin-EDTA (Gibco) at 37° C for 30 min + 1 μg ml−1 DNAse I (Sigma) at room temperature for 5 min. Then hippocampus were mechanical dissociated by pipetting with a fire-polished glass Pasteur pipet until homogenous cell suspension was obtained. Cell viability was determined by Trypan Blue Exclusion Assay. Then cell solution was centrifuged at 150 g for 10 min and the supernatant was removed. The cell pellet was resuspended in culture media: Neurobasal media + 2% B27 + 0.5 mM Glutamate + 1% Penicillin/Streptomycin (Gibco). Between 8×104 and 105 cells were plated onto 12 mm poly-l-lysine coated coverslips neurons for 2D neuronal cell cultures. For neurospheres cultures[26], 1.5×106 cells were seed in poly-dimethylsiloxane (PDMS) customized molds with a unique well of 50 mm × 28 mm. PDMS molds were fabricated in 3D printed ABS cast and polymerized overnight at 90° C. Both 2D neuronal and neurospheres cultures were incubated in culture media at 37° C and 5% CO2. Experiments were performed between DIV14-21.

Slice preparation

Slices were prepared using previously established protocols[15]. For acute slice experiments, coronal sections of the neocortex of P7 to P20 old C57BL/6 mice of both sexes were prepared using a Leica VT1200S vibratome. The animal was decapitated (following deep anesthesia via inhalation of Isoflurane in case of animals older than P12), and the brain quickly removed. Slices of 300 μm thickness were prepared in ice-cold slicing solution containing (in mM): 93 N-Methyl-D-glucamine, 2.5 KCl, 1.2 NaH2PO4, 30 NaHCO3, 20 HEPES, 25 glucose, 5 Na-ascorbate, 3 Na-pyruvate, 10 MgSO4, 0.5 CaCl2, pH adjusted with HCl to 7.3, bubbled with 95% O2 and 5% CO2. After a short recovery period (4-8 min) in 35-37 °C warm slicing solution, slices were kept at room temperature in ACSF until transferred into a recording chamber.

Slice electrophysiology

Neuronal slices were visualized using an Olympus BX50WI microscope equipped with oblique illumination and a water immersion 40x/0.8 NA objective (Olympus). Whole cell recordings (pipette resistance ~ 7 MΩ) were obtained using pipettes pulled from borosilicate glass (1.5mm and 1mm O.D, 0.86mm and 0.5mm I.D, Sutter Instruments Co., USA) and established using our custom-designed amplifier. The external bath comprised of artificial cerebral spinal fluid (ACSF) containing the following (in mM): 126 NaCl, 26 NaHCO3, 1.145 NaH2PO4, 10 glucose, 3 KCl, 2 MgSO4 and 2 CaCl2, Osmolarity ~300 mOsm. Patch pipettes were filled with internal solution containing (in mM): 130 K-gluconate, 5 NaCl, 2 MgSO4, 10 HEPES, 5 EGTA, 4 MgATP, 0.4 Na2GTP, 7 Na2-phospocreatine, 2 pyruvic acid, 0.002-0.01 alexa 488, pH adjusted to 7.2, ~280-290mOsm.

Data availability

The data that supports the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.