| Literature DB >> 31779077 |
Hong-Kai Mao1, Ying Wang1, Xue Wu2, Fang-Wen Su1.
Abstract
In this work, an insulated gate bipolar transistor (IGBT) is proposed that introduces a portion of the p-polySi/p-SiC heterojunction on the collector side to reduce the tail current during device turn-offs. By adjusting the doping concentration on both sides of the heterojunction, the turn-off loss is further reduced without sacrificing other characteristics of the device. The electrical characteristics of the device were simulated through the Silvaco ATLAS 2D simulation tool and compared with the traditional structure to verify the design idea. The simulation results show that, compared with the traditional structure, the turn-off loss of the proposed structure was reduced by 58.4%, the breakdown voltage increased by 13.3%, and the forward characteristics sacrificed 8.3%.Entities:
Keywords: 4H-SiC; IGBT; ON-state voltage; breakdown voltage (BV); turn-off loss
Year: 2019 PMID: 31779077 PMCID: PMC6952884 DOI: 10.3390/mi10120815
Source DB: PubMed Journal: Micromachines (Basel) ISSN: 2072-666X Impact factor: 2.891
Figure 1The schematic cross-sectional views of the (a) conventional insulated gate bipolar transistor (C-IGBT) and (b) heterojunction insulated gate bipolar transistor (H-IGBT).
Devices parameters for the simulations.
| Parameter | C-IGBT | H-IGBT |
|---|---|---|
| Gate oxide wall thickness | 0.05 μm | 0.05 μm |
| Gate oxide bottom thickness | 0.1 μm | 0.1 μm |
| Half-cell width | 2.1 μm | 2.1 μm |
| N- drift thickness | 160 μm | 160 μm |
| P+ source doping | 5 × 1019 cm−3 | 5 × 1019 cm−3 |
| N+ source doping | 2 × 1019 cm−3 | 2 × 1019 cm−3 |
| p-body doping | 4 × 1017 cm−3 | 4 × 1017 cm−3 |
| CSL doping | 1 × 1015 cm−3 | 1 × 1015 cm−3 |
| N- drift doping | 4.5 × 1014 cm−3 | 4.5 × 1014 cm−3 |
| N buffer doping | 1 × 1017 cm−3 | 1 × 1017 cm−3 |
| P+ collector doping | 1 × 1019 cm−3 | 1 × 1019 cm−3 |
| p-SiC doping | — | 1 × 1019 cm−3 |
| p polysilicon doping | — | 1 × 1017 cm−3 |
Figure 2H-IGBT feasibility manufacturing process. (a) Epitaxial layers. (b) Forming a trench region by dry etching. (c) Source region and shield layer formed by ion implantation. (d) Forming a gate by growing an oxide layer and filling the polysilicon. (e) Forming a normal PN junction region by dry etching. (f) Forming a normal PN junction portion by epitaxy.
Figure 3Forward I-V characteristics of C-IGBT and H-IGBT and the concentration distribution of holes in the entire drift region (inset) at x = 1.1μm.
Figure 4The electric field distribution of the C-IGBT and H-IGBT at the time of breakdown and the electric field cut of the entire drift region at x = 1.45 μm.
Figure 5Turn-off characteristic curve and test circuit of C-IGBT and H-IGBT.
Figure 6Electron concentration and carrier recombination rate on the collector side during voltage rise.
Figure 7Electric field cut line and energy band diagram near the collector in the voltage rising phase.
Figure 8Tradeoff curve of conduction voltage drop and turn-off loss.