| Literature DB >> 29515163 |
Xianzhe Liu1, Hua Xu1, Honglong Ning2, Kuankuan Lu1, Hongke Zhang1, Xiaochen Zhang1, Rihui Yao3, Zhiqiang Fang1, Xubing Lu4, Junbiao Peng1.
Abstract
Amorphous Silicon-Tin-Oxide thin film transistors (a-STO TFTs) with Mo source/drain electrodes were fabricated. The introduction of a ~8 nm MoOx interlayer between Mo electrodes and a-STO improved the electron injection in a-STO TFT. Mo adjacent to the a-STO semiconductor mainly gets oxygen atoms from the oxygen-rich surface of a-STO film to form MoOx interlayer. The self-formed MoOx interlayer acting as an efficient interface modification layer could conduce to the stepwise internal transport barrier formation while blocking Mo atoms diffuse into a-STO layer, which would contribute to the formation of ohmic contact between Mo and a-STO film. It can effectively improve device performance, reduce cost and save energy for the realization of large-area display with high resolution in future.Entities:
Year: 2018 PMID: 29515163 PMCID: PMC5841428 DOI: 10.1038/s41598-018-22602-4
Source DB: PubMed Journal: Sci Rep ISSN: 2045-2322 Impact factor: 4.379
Figure 1X-ray reflectivity (XRR) curves for a-STO films with different annealing processes (as-deposition, annealed at 250 °C and 300 °C in air ambient). The inset shows the partial magnification in critical angle region.
The properties of a-STO films with different annealing processes.
| Annealing temperature (°C) | Density (g/cm3) | Thickness (nm) | Roughness (nm) |
|---|---|---|---|
| As-deposition | 5.90 ± 0.22 | 5.27 ± 0.01 | 0.95 ± 0.04 |
| 250 | 6.19 ± 0.05 | 5.11 ± 0.04 | 1.05 ± 0.18 |
| 300 | 6.24 ± 0.10 | 5.10 ± 0.06 | 1.02 ± 0.20 |
Figure 2Output characteristic curves (IDS − VDS) of the a-STO TFTs annealed at (a) 250 °C and (b) 300 °C. (c) Transfer characteristic curves (IDS − VGS) of a-STO TFTs with different annealing temperatures. (d) Dependence of the threshold voltage on the annealing temperature of the a-STO TFTs.
Comparison of the various parameters including μsat, Vth, Ion/Ioff ratio and SS for a-STO TFTs annealed at different conditions.
| Annealing temperature (°C) | μsat (cm2/Vs) | Vth (V) | Ion/Ioff (×106) | SS (V/decade) |
|---|---|---|---|---|
| As-deposition | — | — | — | |
| 250 | 5.24 ± 0.55 | 4.02 ± 1.77 | 6.17 ± 0.91 | 0.70 ± 0.23 |
| 300 | 6.78 ± 0.14 | 3.41 ± 0.51 | 5.99 ± 0.49 | 0.82 ± 0.15 |
Figure 3The O 1 s region of XPS spectra for a-STO films with different pre-annealing temperature: (a) As-deposition; (b) 250 °C; (c) 300 °C, respectively.
Figure 4Plot of total resistance (Rtot) versus channel length (L) for a-STO TFTs annealed at different temperatures: (a) 250 °C and (b) 300 °C. Plot of Rch (c) and RSD (d) at source/drain contacts extracted from (a,b) as a function of gate voltage (VGS), respectively.
Figure 5(a) Cross-sectional HR-TEM image of a-STO TFT annealed at 300 °C and the element distribution maps of Mo and Sn. (b) EDS line scan profiles of cross-sectional a-STO TFT. (c) HR-TEM image of the a-STO TFT. (d) EDS point scan profiles from (c).
Figure 6The energy band diagram of a-STO film contacted with Mo.