| Literature DB >> 27917910 |
Hagyoul Bae1, Byung-Hyun Lee1, Dongil Lee1, Myeong-Lok Seol2, Daewon Kim1, Jin-Woo Han2, Choong-Ki Kim1, Seung-Bae Jeon1, Daechul Ahn1, Sang-Jae Park1, Jun-Young Park1, Yang-Kyu Choi1.
Abstract
We report the transient memory device by means of a water soluble SSG (solid sodium with glycerine) paper. This material has a hydroscopic property hence it can be soluble in water. In terms of physical security of memory devices, prompt abrogation of a memory device which stored a large number of data is crucial when it is stolen because all of things have identified information in the memory device. By utilizing the SSG paper as a substrate, we fabricated a disposable resistive random access memory (RRAM) which has good data retention of longer than 106 seconds and cycling endurance of 300 cycles. This memory device is dissolved within 10 seconds thus it can never be recovered or replicated. By employing direct printing but not lithography technology to aim low cost and disposable applications, the memory capacity tends to be limited less than kilo-bits. However, unlike high memory capacity demand for consumer electronics, the proposed device is targeting for security applications. With this regards, the sub-kilobit memory capacity should find the applications such as one-time usable personal identification, authentication code storage, cryptography key, and smart delivery tag. This aspect is attractive for security and protection system against unauthorized accessibility.Entities:
Year: 2016 PMID: 27917910 PMCID: PMC5137035 DOI: 10.1038/srep38324
Source DB: PubMed Journal: Sci Rep ISSN: 2045-2322 Impact factor: 4.379
Figure 1(a) to (d) show schematics of the proposed disposable memory device with rapidly dissoluble substrate (a) ultrathin substrate including inherent hydroscopic property based on solid sodium with glycerine (SSG). (b) Deposition of bottom electrode (silver) by inkjet printing technique (c) Deposition of HfO2 (10 nm) as resistive switching layer (RSL) by atomic layer deposition (ALD) process. (d) Deposition of top electrode (silver) by inkjet printing technique. (e) A photograph of the dissoluble and flexible memory device and enlarged view of unit cell. The inset shows the image of the fabricated memory device in an unfold state.
Figure 2TEM image of the fabricated RRAM (a) Cross-sectional TEM image of the metal-insulator-metal (MIM) structure along the a-a’ direction. (b,c and d) are EDS mapping images captured for analyzing the Ag component of top and bottom electrodes as well as the Hf and O components of the insulator, respectively.
Figure 3Experimental analysis of the fabricated RRAM device on SSG substrate.
(a) The normal current-voltage characteristics for memory operation with bipolar switching mode at various position on array structure. The inset shows an image of the fabricated 15 × 15 matrix memory device on a SSG substrate. (b) Current-voltage (log I-log V) relation curve in ‘SET’ process. The inset shows (log I)-V characteristic. (c) Switching mechanism for the fabricated memory device. While ‘1’ process leads to the LRS which has low resistance value of sub-10 Ω, ‘2’ process give rise to the HRS which has a high resistance value of about hundreds of Ohm. Resistance change (HRS: 320 Ω → LRS: 6 Ω) through ‘SET’ process by formation of electric conducting filament employing oxygen vacancy as electrical channel of electrons. (d) The retention behavior of the HRS and LRS as function of time. (e) The variation of the HRS and LRS as a function of the retention time and switching cycles (f) SET and RESET voltage distributions of the RRAM described by a box-whisker plot obtained from I-V curves of 50 unit cells.
Figure 4The variation of the HRS and LRS as a function of the bending radius (3 mm to flat state (∞)) of the fabricated RRAM on the SSG substrate with inherent flexibility.
Figure 5Decomposition mechanism of the fabricated memory device and photographs for experiment of the fabricated memory on rapidly dissoluble substrate in untreated water at various temperature step.
(a) Schematics of the melting sequences of the fabricated memory device on the SSG substrate in untreated water. (b) The melting time vs. water temperature plot for submerged device on dissoluble substrate. The inset shows a schematic image of the fabricated memory device. (c) to (e) show optical photographs for dissolution sequence of underwater experiment of the fabricated memory on rapidly melting substrate in water for about 10 s. (c) Image of a device just soaked in water. (d) The decomposed device in water after 4 s. (e) Image of thoroughly destroyed device by water after about 10 s.