Performance Improvement with an Ultrathin p-Type Interfacial Layer in n-Type Vertical Organic Field-Effect Transistors Based on Reduced Graphene Oxide Electrode.

Vertical organic field-effect transistors (VOFETs) with a large current on/off ratio and easy fabrication process are highly desirable for future organic electronics. In this paper, we proposed an ultrathin p-type copper (II) phthalocyanine (CuPc) interfacial layer in reduced graphene oxide (rGO)-based VOFETs. The CuPc interfacial layer was sandwiched between the rGO electrode and the N,N'-dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C8) organic layer. The introduced CuPc interfacial layer not only decreased the off-current density of the device but also slightly enhanced the on-current density. The threshold voltage of the device was also effectively improved and stabilized at around 0 V. The obtained device exhibited a current on/off ratio exceeding 106, which is the largest value reported for rGO-based VOFETs. The vertical electron mobility of the PTCDI-C8 layer estimated by the space-charge-limited current technique was 1.14 × 10-3 cm2/(V s). However, it was not the main limiting factor for the current density in this device. We totally fabricated 48 devices, and more than 75% could work. Besides, the device was stable with little performance degradation after 1 month. The use of low-cost, solution-processable rGO as work-function-tunable electrode and the application of an ultrathin CuPc interfacial layer in VOFETs may open up opportunities for future organic electronics.

Introduction

Organic field-effect transistors (OFETs) play an important role in modern electronic devices.[1−3] They have attracted considerable interest due to their appealing features, such as low cost, easy fabrication, and flexibility.[4,5] To date, most investigated OFETs are the traditionally lateral structure.[6−8] Although some performance improvements have been achieved, the intrinsic long channel length remains a big challenge for its electrical properties. Therefore, vertical organic field-effect transistors (VOFETs) were proposed, in which the channel length is only determined by the thickness of the organic layer.[9,10] Owing to the significantly decreased channel length, these devices could be fabricated in a small size with improved electrical properties, demonstrating great potential for future organic electronics.

Graphene, a typical two-dimensional material, attracts considerable attention due to its excellent electrical and mechanical properties.[11,12] The vertical device structure based on graphene/semiconductor heterostructures has been considered as an interesting platform for electronic devices.[13−25] In these devices, the work function tunability of graphene is exploited under an external gate electrical field to modulate the injection barrier height at the graphene/semiconductor interface. However, almost all of these devices assembled to date have utilized monolayer graphene obtained via the chemical vapor deposition (CVD) method.[18−21] The rather complicated transfer process of CVD-grown graphene cannot satisfy large-scale application in VOFETs.[9] Therefore, an alternative electrode that is easy to fabricate, inexpensive, and capable of large-scale application is urgently needed.

Reduced graphene oxide (rGO) has a similar structure and properties to graphene.[26−28] Importantly, it can be easily mass-produced by the reduction of low-cost graphene oxide (GO).[29,30] Furthermore, the solution-processable rGO electrode is compatible with some industrial processing techniques such as printing and laser-direct writing.[31−33] Hence, the use of rGO to replace the CVD-grown graphene in VOFETs is highly desirable, which benefits the large-scale application in future organic electronics. The first paper on the use of rGO as work-function-tunable electrode in VOFETs has been recently reported.[34] However, the current on/off ratio of the device (>103) still has room for improvement. This is probably due to the relatively thick rGO electrode (approximately 6 nm thick), which is not beneficial for the Schottky barrier height modulation at the rGO/organic semiconductor interface. Therefore, the fabrication of ultrathin rGO electrode is necessary. Nevertheless, the unexfoliated graphite oxide bundles in GO dispersion always make the preparation of ultrathin rGO electrode a challenge. Moreover, as the device uses a single-type N,N'-dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C8) as the organic layer, the injection barrier height at the rGO/PTCDI-C8 interface may not be sufficiently large to limit the off-current. This is a common problem in other graphene-based VOFETs.[9]

Hence, we fabricated pn-rGO-VOFETs based on a p–n junction of organic semiconductors on our proposed solution-processed rGO electrode. An ultrathin p-type copper (II) phthalocyanine (CuPc) interfacial layer was inserted between the rGO electrode and n-type PTCDI-C8 layer. The high-lying lowest unoccupied molecular orbital (LUMO) level of CuPc could significantly reduce the off-current by forming a larger injection barrier height at the rGO/CuPc interface, generating the highest current on/off ratio exceeding 106. Notably, the effect of the p–n junction, not just the energy barrier, had an interesting impact on the threshold voltage (Vth) of the device.

Results and Discussion

The fabrication process of the device is illustrated in Figure a. Briefly, a GO film was formed on an n++Si/SiO2 substrate using a simple spin-coating approach. The rGO electrode was obtained after patterning and reduction treatments. The surface morphologies of the GO and rGO films were investigated using atomic force microscopy (AFM), as these films would be in close contact with the organic layer. A good surface morphology of the rGO film benefits the formation of a well interface. The AFM image of the GO film (Figure b) showed several discontinuous flakes, and the surface was highly uniform and smooth with a root-mean-square (RMS) roughness of 0.59 nm. The film thickness was ∼2.9 nm, suggesting that the GO film was approximately 3 layers because the thickness of the monolayer GO is around 1 nm.[11,26] The rGO film (Figure c) showed a similar smooth surface with an RMS of 0.54 nm. This indicated that the surface morphology was little changed after the reduction treatment. However, the thickness of the rGO film significantly decreased to ∼1.2 nm, which can be attributed to the detachment of the oxygen functional groups during the reduction process. The conductivity of the spin-coated GO electrode (Figure d) was rather low, i.e., only 8.6 × 10–5 S/m. By contrast, the conductivity of the rGO electrode was notably enhanced to 1.1 × 103 S/m. Thus, our simple spin-coating and reduction method could effectively prepare an ultrathin rGO electrode with good electrical conductivity. More importantly, the obtained rGO electrode can be directly utilized as a work-function-tunable electrode without further processing.

Figure 1

(a) Schematic of the device fabrication process. (b, c) AFM images of the GO and rGO films. (d) Conductivity of the GO and rGO electrodes. (e, f) Cross-sectional schematic and top-view optical image of the device.

We fabricated pn-rGO-VOFETs composed of p-type CuPc and n-type PTCDI-C8 on this n++Si/SiO2/rGO substrate; 1-nm-thick CuPc, 500-nm-thick PTCDI-C8, and 50-nm-thick Al electrode were sequentially deposited. A cross-sectional schematic and top-view optical image of the device are shown in Figure e,f, respectively. For comparison, normal rGO-VOFETs with only a 500-nm-thick PTCDI-C8 without a CuPc layer were fabricated; the other parameters were the same as those of the former pn-rGO-VOFETs.

The electrical properties of the devices were tested at room temperature under dark and N2 conditions. Figure a shows the linear output characteristics of the normal rGO-VOFETs without the p-type layer (drain current (ID) versus drain voltage (VD)) at different gate voltages (VG). ID increased as VG increased positively, suggesting that the normal rGO-VOFETs were typical n-channel transistors. In addition, the asymmetric rectifying behavior was observed at the opposite side of VD, with larger current modulation at the positive side than at the negative side. This asymmetric current modulation was attributed to the gate-tunable injection barrier height at the rGO/PTCDI-C8 interface. At VD > 0 V, electrons were injected from rGO to the LUMO of PTCDI-C8; thus, the barrier height at the rGO/PTCDI-C8 interface dominated electron transport. Under this circumstance, a positive VG shifted the Fermi level (EF) of rGO upward, thereby decreasing the barrier height. More electrons would be injected from rGO to the LUMO of PTCDI-C8, and the device was in the “on” state. By contrast, a negative VG moved the EF of rGO downward, causing a larger barrier height for electron injection, and the device would be in the “off” state. While at VD < 0 V, electrons were injected from the Al electrode to the LUMO of PTCDI-C8, and the nearly fixed barrier height at the Al/PTCDI-C8 interface resulted in a rather weak current modulation of the device.

Figure 2

(a, b) Linear output and transfer characteristics of the normal rGO-VOFETs. (c, d) Linear output and transfer characteristics of the pn-rGO-VOFETs.

Figure b shows the transfer characteristics of the normal rGO-VOFETs (ID versus VG). Both the on- and off-currents increased with increasing VD because of the enhanced conductivity of the PTCDI-C8 channel. However, the on-current increased more rapidly compared with the off-current, generating the highest current on/off ratio exceeding 104 at VD = +5 V. The maximum current density was 0.73 mA/cm2 at VD = +5 V and VG = +40 V. The results demonstrated that VOFETs based on this rGO source electrode could successfully operate. Nevertheless, conventional VOFETs that has a stable Vth. The Vth of the normal rGO-VOFETs exhibited a strange behavior that shifted from −15 to −28 V as VD ranged from +1 to +5 V. In practical applications, such an unstable Vth is undesirable.

The carrier mobility of rGO-VOFETs cannot be measured from the ID–VG curves as the conventionally lateral OFETs because the operation of this device depends on the gate-tunable injection barrier height at the rGO/organic semiconductor interface. To investigate whether the current density of the device is limited by the carrier mobility, we evaluated the vertical electron mobility of the PTCDI-C8 layer using the space-charge-limited current (SCLC) technique (Figure S1). The detailed process of the SCLC method was described in our previous report.[35] The calculated vertical electron mobility of the PTCDI-C8 was 1.14 × 10–3 cm2/(V s). Under this mobility, the theoretical current density of the PTCDI-C8 layer was more than 400 mA/cm2 at a voltage of +5 V, which was 3 orders of magnitude higher than that of the normal rGO-VOFETs (0.73 mA/cm2). The results revealed that unlike conventionally lateral OFETs, the carrier mobility of the organic layer was not the main limiting factor for the current density of the normal rGO-VOFETs. Our further research suggested that the current density in the normal rGO-VOFETs was mainly related to the injection barrier height at the rGO/organic semiconductor interface and the whole resistance of the device.

To improve the current on/off ratio of the device further, we fabricated pn-rGO-VOFETs with a 1-nm-thick CuPc interfacial layer between the rGO electrode and the PTCDI-C8 organic layer. The higher LUMO level of CuPc was expected to further limit the off-current in the device. In the linear output characteristics (Figure c), ID increased as VG increased positively, suggesting that electrons were the majority carriers in the device, which was the same as that of the normal rGO-VOFETs. In the transfer characteristics (Figure d), the off-current was significantly decreased by introducing the ultrathin p-type CuPc layer. Surprisingly, despite the larger injection barrier height at the rGO/CuPc interface, the on-current of the device did not decrease but increased slightly. The device exhibited a maximum current on/off ratio exceeding 106, which is also the largest value reported so far for VOFETs based on rGO electrode. More importantly, the Vth of the device, which decreased and stabilized at around 0 V, was also effectively improved. The electrical properties of the devices are listed in Table . These experimental results strongly indicated that the application of an ultrathin CuPc interfacial layer not only achieved a higher current on/off ratio but also improved the Vth of the device.

Table 1

Electrical Properties of the Normal rGO-VOFETs and pn-rGO-VOFETs at VD = +5 V

device	on-current density (mA/cm2)	off-current density (mA/cm2)	on/off ratio	Vth (V)
rGO-VOFETs	0.73 (±0.025)	7.14 × 10–5	1.02 × 104	–28 (±1.24)
pn-rGO-VOFETs	0.79 (±0.027)	7.46 × 10–7	1.06 × 106	–3 (±1.31)

The energy level of the device was analyzed to investigate the effect of the ultrathin CuPc interfacial layer. The work function of the rGO electrode was estimated to be 5.3 eV using photoelectron yield spectroscopy (Figure S2). The LUMO level of PTCDI-C8 is approximately 4.3 eV.[19] Due to the gate-tunable injection barrier height at the rGO/PTCDI-C8 interface, ID could be effectively modulated under different VG at VD > 0 V. When an ultrathin CuPc interfacial layer was applied, the higher LUMO level (3.5 eV) of CuPc was expected to limit both the on- and off-current densities of the device because of the intrinsically larger injection barrier height at the rGO/CuPc interface. Interestingly, only the off-current density was significantly restrained, whereas the on-current density of the device was slightly enhanced from 0.73 to 0.79 mA/cm2. In addition, the Vth of the device was modified and stabilized at approximately 0 V. In this regard, the improvement in device performance cannot be simply explained by the high-lying LUMO level of the CuPc interfacial layer.

The stability and aging issue of the device are important factors for its future applications. The electrical properties of the devices (normal rGO-VOFETs and pn-rGO-VOFETs) were measured after 1 week and 1 month to evaluate the device stability and aging issue. The electrical properties of the devices were almost same after 1 week, with a slight decrease after 1 month. Notably, the electrical conductivity of the rGO electrode and Al electrode was very stable after 1 month, and thus the slight decrease in the device performance was mainly attributed to the degradation of the organic layer. It is a common problem for n-type OFETs because the electron is very sensitive to O2 and H2O in the atmosphere.[36] Although the aging issue seems to be unavoidable for this organic layer (PTCDI-C8), it could be alleviated if the device is stored in a total inert atmosphere.

We further studied the electrical properties of the devices with different thicknesses of the CuPc interfacial layer. Here, 2-, 3- and 4-nm-thick CuPc layers were applied, and the electrical characteristics and properties of the devices are shown in Figure S3 and Table S1, respectively. The changing trends in the on-current density, off-current density, and current on/off ratio with the thickness of the CuPc interfacial layer are comprehensively illustrated in Figure . Only a 1-nm-thick CuPc interfacial layer could promote the on-current density. With a thicker CuPc interfacial layer (thickness of 2, 3, and 4 nm), the on-current density of the device gradually decreased. The off-current density could be effectively restrained by these CuPc layers, and the highest current on/off ratio exceeding 106 was generated with the 1-nm-thick CuPc interfacial layer.

Figure 3

On-current density, off-current density, and current on/off ratio of the devices with different thicknesses of the CuPc interfacial layer at VD = +5 V.

In addition, a 1-nm-thick n-type organic semiconductor C60 was applied as an interfacial layer in the device to investigate whether it could have the same effect as the p-type CuPc layer (Figure S4). Notably, the LUMO level (4.0 eV) of C60 is higher than that of PTCDI-C8 but lower than that of CuPc; therefore, if the C60 interfacial layer could also have such an effect, the on-current density of the device would be higher than that of the device with the CuPc interfacial layer. However, from the experimental results (Table S2), we can observe that both the on- and off-current densities were restrained for the device with a 1-nm-thick C60 interfacial layer. This result can be attributed to the larger injection barrier height at the rGO/C60 interface. Moreover, the Vth of the device was little modified. Therefore, the general band energy theory cannot fully explain the effect of the CuPc interfacial layer. Obtaining a deeper understanding of the ultrathin CuPc interfacial layer in the device may be worthwhile.

Here, a plausible mechanism is proposed to explain the effect of the ultrathin CuPc interfacial layer based on the aforementioned experimental results and analysis. As schematically illustrated in Figure , when the device is in the “off” state (VG < 0 V), the larger injection barrier height at the rGO/CuPc interface hinders the electron injection, and thus, the off-current density is significantly suppressed. On the contrary, when the device is in the “on” state (VG > 0 V), the EF of rGO would move upward and the injection barrier height may not be sufficiently large for electron injection. In addition, the positive gate voltage induces electrons on the opposite side of the SiO2 insulator layer, which further induces holes on the surface of the p-type CuPc interfacial layer owing to the partial screening effect of the ultrathin rGO electrode.[1,25] The uniform distribution of holes on such an ultrathin CuPc layer causes the band bending of CuPc, which promotes electron injection through the tunneling effect. Due to these synergistic effects, the on-current density exhibited a slight increase after application of an ultrathin CuPc interfacial layer.

Figure 4

Schematic of the energy diagrams of the device at VD > 0 V.

The improvement in the on-current density was limited only to the application of the 1-nm-thick ultrathin p-type CuPc interfacial layer. For devices with thicker CuPc interfacial layers (2, 3, and 4 nm), the on-current density gradually decreased. On the one hand, a thicker p-type CuPc interfacial layer inhibits electron transport. On the other hand, the tunneling effect can only occur in an ultrathin CuPc layer. Moreover, the on-current density of the device with 1-nm-thick ultrathin n-type C60 interfacial layer could not be enhanced. This is because the positive VG could not induce sufficient holes on the surface of the n-type C60 layer and cause the band bending effect since the majority charge carriers in C60 are electrons.

We now discuss the modulation of Vth in these devices. For the normal rGO-VOFETs without the CuPc interfacial layer, Vth shifted more negatively with increasing VD. This is because a higher drain electrical field assists electron injection into the PTCDI-C8 layer and less elevation of EF by VG is required. When an ultrathin p-type CuPc interfacial layer was introduced, Vth gradually shrunk at approximately 0 V. By contrast, the n-type C60 interfacial layer cannot effectively modify Vth. As discussed above, only the positive VG can induce sufficient holes on the surface of the p-type CuPc interfacial layer (such an effect is not available for the n-type C60 interfacial layer) and promote electron injection through the tunneling effect; therefore, the output current always rises at VG = 0 V regardless of VD. Hence, the Vth of the pn-rGO-VOFETs gradually decreased and stabilized at around 0 V.

Conclusions

We developed a promising spin-coating and reduction method to prepare an ultrathin rGO film that could be directly used as a work-function-tunable electrode in VOFETs. An ultrathin CuPc layer was applied at the rGO/PTCDI-C8 interface. The introduced CuPc interfacial layer not only restrained the off-current density from 7.14 × 10–5 to 7.46 × 10–7 mA/cm2, but also slightly promoted the on-current density from 0.73 to 0.79 mA/cm2, generating the highest current on/off ratio of 1.06 × 106, which is the largest value reported so far for the rGO-based VOFETs. The applied CuPc interfacial layer also improved the Vth of the device, and the Vth of the pn-rGO-VOFETs gradually decreased and stabilized at approximately 0 V. The vertical electron mobility of the PTCDI-C8 layer estimated by the SCLC method was 1.14 × 10–3 cm2/(V s). However, it was not the main limiting factor for the current density in this device. We totally fabricated 48 devices, and more than 75% could work. Besides, the device was stable after 1 month with little performance degradation. The use of a low-cost, solution-processable rGO as a work-function-tunable electrode in VOFETs, along with the application of an ultrathin p-type CuPc interfacial layer, may bring new opportunities for future organic electronics.

Experimental Section

First, the substrate was ultrasonically cleaned in water, acetone, and IPA solution for 10 min each. Subsequently, it was dried under nitrogen flow and treated in a UV-O3 cleaner for 20 min. A commercial GO dispersion (purchased from Graphenea) with a concentration of 4 mg/mL was highly purified via a series of centrifugation treatments and then diluted to 0.5 mg/mL. The highly purified GO dispersion (300 μL) was dripped onto an n++Si/SiO2 substrate and spin-coated at 500 rpm for 120 s, 1000 rpm for 30 s, and 2000 rpm for 30 s. The spin-coated GO film was then dried at 100 °C for 10 min and patterned manually. The patterned GO film was first chemically reduced under hydrazine monohydrate vapor and then thermally reduced at 300 °C for 6 h to obtain an rGO electrode. After that, 1-nm-thick p-type CuPc and 500-nm-thick n-type PTCDI-C8 layers were deposited at the rates of 0.8 and 3 Å/s, respectively, through a shadow mask using vacuum deposition equipment. The vacuum pressure was under 4 × 10–4 Pa during the deposition of organic semiconductors. Finally, 50-nm-thick Al electrode was deposited at a rate of 8 Å/s under a vacuum pressure of 8 × 10–4 Pa through a shadow mask. The active area of the device was 50 000 μm2, determined by the overlapping area of the rGO and top Al drain electrodes.

A total of 48 devices (half for normal rGO-VOFETs and half devices for pn-rGO-VOFETs) were fabricated, and more than 75% of the devices could stably work. There were 8 devices in one batch, and the 48 devices were fabricated in 6 batches. The same device performance was almost stable for different batches and different spatial locations because the same fabrication parameters such as deposition rate, vacuum pressure, and testing conditions were strictly kept. The error (standard deviation value) of the on-current density and Vth of the devices was calculated and is presented in Table . The errors for the on-current densities of the normal rGO-VOFETs and pn-rGO-VOFETs were ±0.025 and 0.027 mA/cm2, respectively. The errors for the Vth of the normal rGO-VOFETs and pn-rGO-VOFETs were ±1.24 and 1.31 V, respectively.

The electrical characteristics of the devices were measured using a semiconductor parameter analyzer (Agilent 4155C) at room temperature in the dark and under dry N2 conditions.

The I–V curves of the GO and rGO electrodes were measured by a two-terminal method. First, the patterned GO and rGO electrodes were prepared on the n++Si/SiO2 substrate. Then, the Al electrode was deposited on the patterned GO and rGO electrode through a shadow mask using vacuum deposition equipment. The voltage was applied from 0 to 10 V, and the generated current was collected to obtain the I–V curves of the GO and rGO electrodes.

The work function of the rGO film was measured using photoelectron yield spectroscopy under vacuum conditions. Briefly, 300 μL of highly purified GO dispersion was spin-coated on an n++Si/SiO2 substrate. After drying and reduction treatment, an rGO film was formed on the n++Si/SiO2 substrate. The substrate was then fixed on a holder and placed in the chamber. After the vacuum level of the chamber reached 3 × 10–3 Pa, the measurement was started.