| Literature DB >> 35843869 |
Rahul Pendurthi1, Darsith Jayachandran1, Azimkhan Kozhakhmetov2, Nicholas Trainor2,3, Joshua A Robinson2,3, Joan M Redwing2,3, Saptarshi Das1,2,3,4.
Abstract
Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high-performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n-type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p-type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n-type MoS2 and p-type vanadium doped WSe2 FETs with non-volatile and analog memory storage capabilities to achieve a non-von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n-type and p-type FETs, which is critical for any IC development. Inverters and a simplified 2-input-1-output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non-von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.Entities:
Keywords: complementary logic; field-effect transistors; heterogeneous integration; integrated circuits; two-dimensional materials
Year: 2022 PMID: 35843869 DOI: 10.1002/smll.202202590
Source DB: PubMed Journal: Small ISSN: 1613-6810 Impact factor: 15.153