Scaling up and down of 3-D floating-point data in quantum computation.

In the past few decades, quantum computation has become increasingly attractive due to its remarkable performance. Quantum image scaling is considered a common geometric transformation in quantum image processing, however, the quantum floating-point data version of which does not exist. Is there a corresponding scaling for 2-D and 3-D floating-point data? The answer is yes. In this paper, we present a quantum scaling up and down scheme for floating-point data by using trilinear interpolation method in 3-D space. This scheme offers better performance (in terms of the precision of floating-point numbers) for realizing the quantum floating-point algorithms than previously classical approaches. The Converter module we proposed can solve the conversion of fixed-point numbers to floating-point numbers of arbitrary size data with [Formula: see text] qubits based on IEEE-754 format, instead of 32-bit single-precision, 64-bit double-precision and 128-bit extended-precision. Usually, we use nearest-neighbor interpolation and bilinear interpolation to achieve quantum image scaling algorithms, which are not applicable in high-dimensional space. This paper proposes trilinear interpolation of floating-point data in 3-D space to achieve quantum algorithms of scaling up and down for 3-D floating-point data. Finally, the quantum scaling circuits of 3-D floating-point data are designed.

Introduction

Quantum computation is a theoretical computation system that performs operations on data by using quantum-mechanical phenomena (such as superposition and entanglement). In 1982, Feynman[1] proposed the concept of quantum computer at first. After that, the integer factoring problem[2] and database search algorithm[3] were essential evidences supporting the power of quantum computers. Researches in quantum image processing field started with proposals on quantum image representations such as Qubit Lattice[4], Real Ket[5] and Entangled Image[6]. After 2011, some more practical quantum image models using entangled states (FRQI[7]) and superposition states (NEQR[8], INEQR[9], GQIR[10], QRDS[11], GFPRQS[12], QR2-DD[13], etc.) have been proposed. With the proposal of NEQR representation, Chetia et al.[14] introduced a quantum image edge detection algorithm based on NEQR. Chakraborty et al.[15] provided a brief survey of the current status of research in the quantum image processing paradigm in 2018. In addition, Chakraborty et al.[16] proposed a combination of three different approaches for representing color quantum images in ternary quantum system. In 2018, Chakraborty et al.[17] proposed and designed a circuit level implementation of the quantum multilevel threshold based color image segmentation technique.

At present, quantum image processing research has been paid more attention to the transform domain. Fijany and Williams[18] studied fast algorithms and complete circuits for quantum wavelet transforms (QWT). Caraiman and Manta[19] introduced quantum image filtering in the frequency domain. Quantum arithmetic operations were given by Ruiz-Perez and Garcia-Escartin[20] based on quantum Fourier transform (QFT). Li and Sun[21] presented quantum color image filtering in the frequency domain. There are many research results in the transform domain. Asaka et al.[22] discussed an implementation of the fast Fourier transform (FFT) as a quantum circuit. The quantum version of the FFT (QFFT) is defined as a transformation of a tensor product of quantum states. Chakraborty et al.[23,24] proposed the image denoising schemes based on QWT. Chang and Vasilakos[25] presented core concepts of QFT and inverse QFT and given the reason of why QFT and inverse QFT are able to give exponential speed-up for FFT. Grigoryan and Agaian[26] proposed a new quantum representation of images: Fourier transform representation. Indeed, the QFT is a key ingredient of many important quantum algorithms, including Shor’s factoring algorithm and the quantum phase estimation algorithm to estimate the eigenvalues of a unitary operator. Therefore, we propose the design scheme of quantum algorithm for 3-D floating-point data based on QFT in this paper.

In recent years, quantum image scaling as a kind of image geometric transformation has been widely studied and applied in quantum image processing. Jiang and Wang[9] proposed quantum algorithms and circuits to realize the quantum image scaling based on the INEQR model for quantum images using the nearest neighbor interpolation. Jiang et al.[10] given an improved quantum image representation GQIR and proposed a quantum algorithm to scale up quantum images based on nearest-neighbor interpolation with integer scaling ratio. Sang et al.[27] constructed the quantum circuits of the nearest-neighbor interpolation method for FRQI and NEQR. Zhou et al.[28] proposed the bilinear interpolation method for NEQR and given the corresponding quantum realization circuits. Li and Liu[29] designed quantum image scaling using bilinear interpolation method based on QFT. Zhou et al.[30] given quantum image scaling based on bilinear interpolation with arbitrary scaling ratio. However, as far as we know, three-dimensional (3-D) quantum floating-point data versions of which do not exist.

The problem of classical 3-D image (or data) reconstruction is currently a hot topic, such as the reconstruction technology of 2-D to 3-D data. We given a method to convert a 3-D data into 2-D data based on QR2-DD[13]. The dimensionality reduction from 3-D to 2-D data can reduce the number of qubits, and consequently, resources are saved at location information. As far as we know, the inverse problem, that is, 2-D to 3-D reconstruction problem, such as computed tomography (CT) imaging, has important practical significance. However, the quantum floating point data are not discussed. Inspired by this, we conducted preliminary explorations on the reconstruction of 2-D to 3-D quantum floating-point data. Therefore, the further research of our work can provide research ideas for the reconstruction of 2-D to 3-D quantum data.

Floating-point arithmetic precision is limited in length, such as the IEEE single (double, extended) precision format is 32-bit (64-bit, 128-bit) long. However, some problems require a longer floating-point format because of round-off errors. Such problems are usually solved in arbitrary precision (p+q)[13].

Compared with fixed-point numbers, floating-point numbers offer great savings in the number of qubits when the required range of values or relative precision is large. It is very meaningful to consider the quantum scaling of floating-point data in 3-D space. Li and Liu[29] designed quantum image scaling using bilinear interpolation method based on QFT, in which two core operations (i.e., addition and multiplication) are implemented using QFT. Therefore, we consider using trilinear interpolation method to study the quantum scaling of floating-point data in 3-D space. In this paper, we present a quantum scaling up and down scheme of floating-point data by using trilinear interpolation method based on QFT in 3-D space. It has three main contributions:In addition, based on QFT, we design the addition and multiplication (Q-Adder and Q-Multiplier modules) of 3-D floating-point data. Combining some basic modules in this paper, we propose the design scheme of the quantum scaling up and down of 3-D floating-point data using trilinear interpolation method based on QFT. Finally, we give the quantum scaling circuits of 3-D floating-point data.

The trilinear interpolation method for quantum scaling up and down of 3-D floating-point data is proposed for the first time.

The generalized floating-point quantum representation of 3-D data in this paper can represent the arbitrary precision (p+q).

A Converter module for converting fixed-point numbers to floating-point numbers is proposed.

The remainder of this paper is organized as follows: “Preliminaries’ ’section gives a brief introduction to quantum representation of 3-D floating-point numbers, classical interpolation methods and QFT. After the description of the basic modules in “Some modules” section, the addition and multiplication of the floating-point based on QFT (Q-Adder and Q-Multiplier) and Converter for converting fixed-point numbers to floating-point numbers are designed in “Floating-point addition and multiplication based on QFT” section. “Quantum scaling-up circuit for 3-D floating-point data” and “Quantum scaling-down circuit for 3-D floating-point data”sections introduce the design scheme of quantum scaling up and down for 3-D floating-point data using trilinear interpolation method. “Complexity analysis” section analyzes the computational complexity of the scaling circuits based on the elementary gates. Finally, conclusions and future research works are described in “Conclusions” section.

Preliminaries

In this section, we briefly explain an overview of the foundation of the proposed methodology, including quantum representation of 3-D floating-point numbers, classical interpolation methods and QFT.

A quantum gate is simply an operator that acts on qubits. Such operators can be represented by unitary matrices. Some of the basic gates and their corresponding matrices are shown in (1). The identity gate (I), Hadamard gate (H), NOT gate (X), controlled-NOT gate (CNOT) and controlled-phase gate () are well-known[31], here,Format of floating-point numbers in IEEE-754 (Institute of Electrical and Electronics Engineers, IEEE)[13] is shown in Table 1.

Table 1

Format of floating-point numbers in IEEE-754.

s	e	f
signbit	exponent	fractional(mantissa)

Generalized floating-point quantum representation of 3-D data

Suppose binary sequence encodes the floating-point number of 3-D data corresponding to the location of . This proposal integrates information about a 3-D data in Fig. 1 into a quantum state having it formula in (2):whereHere, is the location information, can store a floating-point number of 3-D data, and denotes rounding up. Let is a sign qubit, an encoded exponent field of p qubits denoted by and a normalized binary fractional having qubits to the right of the radix point denoted by . That is, floating-point format of is shown in Table 2, and each format’s parameters are shown in Table 3.

Figure 1

3-D data.

Table 2

Floating point format of .

1	p	q-1
s	e	f
sYXZ0	sYXZ1sYXZ2…sYXZp	sYXZp+1sYXZp+2…sYXZp+q-1
SYXZs	SYXZe	SYXZf

Table 3

Summary of format parameters.

Parameter	Format
	Single	Single extended	Double	Double extended
p	8	≥11	11	≥15
q	24	≥32	53	≥64
Format width in bits	32	≥43	64	≥79

Classical interpolation methods

In image scaling, interpolation methods are necessary to produce new pixels (when scaling up) or delete redundant pixels (when scaling down). The commonly used interpolation methods include nearest neighbor, linear and cubic interpolation in Fig. 2:

Figure 2

The principle of interpolation in one direction.

As shown in Fig. 2, the value of the destination pixel (x, c) can be estimated by linear interpolation method, i.e.,The bilinear interpolation method plays an important role in classical image scaling. For a (width and height) image, the size of the corresponding interpolated image is , which can be described in two steps.The coordinate of the interpolated image is restored from the positions (Y, X), , and in the original image. The corresponding relationship is shown in Fig. 3. Here,where denotes rounding down.The pixel value in position of the interpolated image using bilinear interpolation method can be calculated as follows:Hance, the bilinear interpolation method is a single linear interpolation method in the y direction and two single linear interpolation methods in the x direction.

Figure 3

Coordinate map relationship.

Step 1: Coordinate map.

Step 2: Calculating pixel value.

Quantum Fourier transform

The Quantum Fourier Transform, QFT, is an application of classical discrete Fourier transform to the quantum states. The QFT on an orthonormal basis is defined to be a linear operator with the following action on the basis states:where i is an imaginary unit. The specific quantum circuits are shown in Fig. 4, where . For simplicity, in this figure we have omitted the sequence of SWAP gates needed to invert the order of the output qubits.

Figure 4

Quantum circuits that implement QFT. Not shown are swap gates at the end of the circuit which reverse the order of the qubits[31].

We can equally define an Inverse Quantum Fourier Transform operator IQFT so thatWith the direct and the inverse Fourier transforms, we can move back and forth between the computational basis and the phase representation. In our notation, this conversion from the phase encoding to the computational basis is written asBy employing 1-qubit Hadamard gates H and 2-qubit controlled-phase gates , the QFT and IQFT can be efficiently implemented.

Quantum scaling up and down

In the following subsections, we first introduced some basic modules: adding one, rotation, adder, multiplier, special subtractor and divided by 2 modules, and then we designed the addition and multiplication of the floating-point based on QFT (Q-Adder and Q-Multiplier) and Converter for converting fixed-point numbers to floating-point numbers. Finally, we proposed the design scheme of quantum scaling up and down for 3-D floating-point data.

Some modules

In the next subsection, a series of quantum modules are used. So we introduce their circuits in this subsection.

Adding one module based on integer

In this paper, we use the adding one module based on integer[32], and its quantum circuit is shown in Fig. 5, where , n is a positive integer, , . The operator of the rotation module can be expressed asand the corresponding quantum circuit is shown in Fig. 6, in other words, its effect is to introduce a phase shift in frequency domain, where . Li[29] proposed a new method for the design of two core modules (i.e., addition and multiplication) based on QFT. It is clear that the subtraction operation could be implemented by a bit of modification in . If we replace the element in matrix with , then the quantum adder circuit would act as a quantum subtractor whose output will become . We don’t give the detail quantum circuit of the quantum subtractor module. The quantum circuits of quantum adder and subtractor and multiplier modules are shown in Figs 7,  8 and 9, respectively.

Figure 5

Adding one module[32].

Figure 6

Rotation module[31].

Figure 7

Adder module[29].

Figure 8

Subtractor module[29].

Figure 9

Multiplier module[29].

Rotation module

The function of this module is to implement the subtraction of two m-qubit numbers, i.e. , , and the special subtractor quantum circuit is shown in Fig. 10. Zhang et al.[12] design the divided by 2 module in 2020. The divided by 2 module is to make a floating-point number to , where . The circuit for floating-point divided by 2 module is depicted in Fig. 11.

Figure 10

Special Subtractor module[29].

Figure 11

Divided by 2 module[12].

module

Floating-point addition and multiplication based on QFT

In the next subsection, the addition and multiplication of the floating-point based on QFT (Q-Adder and Q-Multiplier) and Converter module are designed. The QFT offers an interesting way to perform arithmetic operations on a quantum computer. Nielsen[31] given the quantum circuit of the QFT. Adder and Multiplier modules[33] based on floating-point numbers are given. We will benefit from the circuits[29,33] in our quantum addition and multiplication circuits based on QFT. In this paper, we design the addition and multiplication based on QFT (Q-Adder and Q-Multiplier) operations, and the quantum circuits are depicted in Figs. 12 and 13. In order to have the same number of bits of the two floating-point numbers that are multiplied, we designed the Converter module for converting fixed-point numbers to floating-point numbers in the design scheme of quantum scaling for 3-D floating-point data, and the quantum circuit is depicted in Fig. 14. For convenience, other unremarked qubits are the garbage outputs. Figure 12 shows the addition of two floating-point numbers and , where , .The comparator module based on integer (CMP) is used to compares two exponents information and of and . If , swap the two floating-point numbers (comparison followed by controlled swaps). Align the two results according to the difference in exponents . (only if , else the adder will have no effect, in ②).Compute two’s complement from sign bits and mantissas (including the implicit leading 1). The second mantissa is shifted by the difference of the exponents and . Add mantissas in two’s complement.

Figure 12

Q-Adder module.

Figure 13

Q-Multiplier module.

Figure 14

Converter module.

Step ①. Determine result exponent .

Step ②. Add mantissas in two’s complement.

Step ③. Renormalize the intermediate result.

The final RN gate renormalizes the intermediate result using the first-ones circuit followed by shifting the mantissa by the output of the first-ones circuit (i.e., if adding the two mantissas in ② caused an overflow, right-shift the result by 1 and increment the exponent) and copies out the resulting floating-point representation. Figure 13 shows the multiplication of two floating-point numbers and , where , . There is only one renormalization step involved. In summary, it requires the following steps:

Determine result exponent.

Multiply mantissas (including the implicit leading 1) into a -bit register.

If there was an overflow, right-shift by one and increment the result exponent.

The final step denoted by consists of conditionally copying out of the resulting exponent, mantissa and sign bit.

In Fig. 14, Converter module converts fixed-point numbers to floating-point numbers, where , . Before explaining the circuit, we first need to normalize .

Step ①. Calculate the bias value. That is, module can be realized by adding one module times.

Step ②. Calculate the value of the exponent code using the formula , where the truth value of the exponent code is the value of exponent code after normalization, , similar to Step ①.

Step ③. Calculate the value of the mantissa. If , the value of the mantissa can be realized using the Toffoli gate and zero padding at the end of . Therefore, the remaining cases (example and ) are carried out in this way in sequence. That is to say, determine the position of the first 1.

Quantum scaling-up circuit for 3-D floating-point data

In this subsection, the quantum scaling-up circuit of 3-D floating-point data based on QFT using trilinear interpolation is designed. The key idea of the proposed circuit is mathematically explained in (13).

Without loss of generality, the quantum representation for an array of 3-D floating-point data in (2) () can be expressed as follows:whereThe quantum representation uses Y (h qubits), X (w qubits), Z (l qubits), , respectively, to denote the Y-coordinate, X-coordinate, Z-coordinate and a floating-point number of 3-D data.

Assume that there is an array of 3-D floating-point data and the size of the resulting data after being scaled is , i.e., , and (where , and represent the scaling in y-coordinate, x-coordinate, z-coordinate axis directions, respectively). The trilinear interpolation method for 3-D floating-point data can be described within the following two steps in detail.The coordinate position of the interpolated data can build a map relationship with the four positions , , and (Y, X, Z) of the original data when X is fixed. The coordinate position of the interpolated data can build a map relationship with the four positions , , and of the original data when is fixed. The coordinate position of the interpolated data can build a map relationship with the two positions , of the original data when yoz plane is fixed. The corresponding relationship is shown in Fig. 15. Therein,where represents the rounding down operation, , , . To build the mapping relationship described in Fig. 15, the multiply Control-Not operations and adding one operation are chosen as the unitary operators. The function of the multiply Control-Not operators is to utilize h Control-Not gates to copy the h qubits into the h ancillary qubits . Through these two unitary operators, the interpolation mapping relationship between the position of original data and the interpolated data has been established. The details are described in Figs. 17 and 18.According to (6), the value for 3-D floating-point data in position of the interpolated data using trilinear interpolation can be calculated as follows:Therefore,

Figure 15

Coordinate map relationship for 3-D.

Figure 17

Scaling-up circuit(1).

Figure 18

Scaling-up circuit(2).

Step 1: Build coordinate map relationship.

Step 2: Calculating value for 3-D floating-point data.

According to (11), and and in (13) are the remainder of and and , respectively. From (13), in order to prepare the floating-point data in position of the resulting data, the floating-point data , , , , , , and in positions , , , (Y, X, Z), , , and of the original data need to be prepared first. Trilinear interpolation method utilizes these eight different positions of the original position (Y, X, Z) to map into one position of the resulting data as shown in Fig. 15. The size of an array of given original data is known. At the same time, the size of the resulting data is known under a certain scaling ratio. Therefore, can be considered as the input state when designing quantum circuit. Figs. 17 and 18 provide scaling-up circuit of 3-D floating-point data based on QFT using trilinear interpolation method.

Next, we explain the workflow of this circuit.

The inputs of this circuit are eight identical original data (denoted by , , , , , , and ) and the data positions in the scaled-up data denoted by , , , (Y, X, Z), , , and ), where the subscript indicates the number of qubits. The output of this circuit is the scaled-up data denoted by .

Firstly, eight quantum oracle operators , , , , , , and are used to compute the original data values of , , , , , , and , respectively. A quantum oracle operator can realize the aim of assigning floating-point data to the ancillary qubits , which can be expressed by (14)the function of is setting the value of the ith qubit of the data in (Y,X,Z):where is the XOR operation, . are used to perform () XOR gate on the () to obtain the data, as shown in following equation:Then, three Special Subtraction modules are used to obtain , , , where , , , respectively. Further, eight groups of intermediate results , , , , , , , are obtained. Here, we need to point out that the multiplication between the first three items in each group is the fixed-point multiplication based on QFT (Multiplier module, given by Fig. 9). Since the Multiplier module requires the qubits to be the same, we obtain the final number of qubits by seeking the maximum value. The number of qubits after multiplying the first three items in each group is , , , , , , , , respectively. Before multiplying with the fourth item floating-point data, the result of the previous fixed-point multiplication needs to be converted into the floating-point data of the same qubit through the Converter module, given by Fig. 14. Finally, the multiplication here uses the floating-point multiplier based on QFT (Q-Multiplier module, given by Fig. 13). For convenience, we omit the process of seeking the maximum value in the Multiplier module and the Converter module before the Q-Multiplier module, refer to Figs. 17 and 18.

Finally, 3-D floating-point data of the scaled-up is obtained by using seven Q-Adder modules (given by Fig. 12) and Divided by 2 modules (given by Fig. 11) . So far, we have completed the image scaling-up operation based on trilinear interpolation method. The scaling-up circuit of 3-D floating-point data is given by Figs. 17 and 18. For convenience, other unremarked qubits are the garbage outputs. Therefore, Figs. 17 and 18 are simplified scaling-up circuit, where ancillary and garbage outputs are omitted.

For convenience, we show the schematic representation of the scaling-up circuit as Fig. 16, where the small cube represents a voxel point of the 3-D floating-point data, the right side is the scaled-up data representation, , , .

Figure 16

Schematic representation of the scaling-up circuit, where , , .

Quantum scaling-down circuit for 3-D floating-point data

Assume that there is an array of 3-D floating-point data and the size of the resulting data after being scaled is , i.e., , and (where , and represent the scaling in y-coordinate, x-coordinate, z-coordinate axis directions, respectively). Therefore, the scaling-down value for 3-D floating-point data in position of the interpolated data using trilinear interpolation can be calculated as follows:Figures 19 and 20 provide scaling-down circuit of 3-D floating-point data based on QFT using trilinear interpolation method.

Figure 19

Scaling-down circuit(1).

Figure 20

Scaling-down circuit(2).

Next, we explain the workflow of this circuit.

Firstly, eight quantum oracle operators , , , , , , and are used to compute the original data values of , , , , , , and , respectively.

Then, adding one, Special Subtraction, Multiplier, Converter and Q-Multiplier modules are used to design the scaling-down circuit of 3-D floating-point data.

Finally, 3-D floating-point data of the scaled-down is obtained using seven Q-Adder modules and Divided by 2 modules. So far, we have completed the image scaling-down operation using trilinear interpolation method. For convenience, other unremarked qubits are the garbage outputs. Therefore, Figs. 19 and 20 are simplified scaling-down circuit, where ancillary and garbage outputs are omitted.

Complexity analysis

The circuit network complexity depends on the number of elementary gate in quantum image processing (QIMP). The complexity of the basic quantum gate is considered to be one, including NOT gate, Control-Not gate and any unitary operator[31].

The network complexities of adding one, QFT, IQFT, rotation, adder and subtractor modules are all [29,31]. The Multiplier module consists of 1 QFT, Multiply by 2, n Rotation, and 1 IQFT, and so, the complexity of Multiplier module is [29]. For the Special Subtractor module, Fig. 10 shows that it consists of CNOT gates and 1 adding one module, and so, the complexity of Special Subtractor module is . An m-controlled NOT gate in the divided by 2 module can be decomposed into Toffoli gates and 1 CNOT gate and the Toffoli gate can be approximately simulated by 6 CNOT gates[31], so the complexity of it is . Hence, the complexity of preparing the divided by 2 module is . In (16), if is a -controlled NOT qubit gate. Otherwise, it is a quantum identity gate. That is to say, every oracle operator , , is at most a -controlled NOT qubit gate. For other oracle operators , , , , , and , the principle is also same as . The complexity of oracle operator is . The scaling-up circuit of 3-D floating-point data includes eight oracle operators of , , , , , , and . Here, the total quantum cost in eight oracle operators is . The network complexities of Q-Adder and Q-Multiplier modules are and based on[31,33,34], respectively. According to Fig. 14, the Converter module can be decomposed into adding one, k-Control-adding-one, , Toffoli gates, m-controlled NOT gates, . The quantum cost of m-controlled NOT gates isOnly 2-Control-Unitary gates were needed to construct 1 k-Control-Unitary gate, as well as some assistant qubits[34]. Therefore, 1 k-Control-adding-one can be constructed by 2-Control-adding-one. The quantum cost of k-Control-adding-one isTo sum up, the complexity of the Converter module is .

Case 1: The complexity of the scaling-up circuit.

We analyze the complexity of the scaling-up circuit of 3-D floating-point data. The quantum circuit consists of 12 Special Subtractor, 8 adding one, 16 Multiplier, 8 Q-Multiplier, 7 Q-Adder, CNOT gates, 8 oracle operators, 8 Converter, and Divided by 2.

Therefore, the complexity of the scaling-up circuit of 3-D floating-point data can be calculated as follows:where , .

Case 2: The complexity of the scaling-down circuit.

Similar to the complexity of the scaling-up circuit, we analyze the complexity of the scaling-down circuit of 3-D floating-point data. The quantum circuit consists of 12 Special Subtractor, 12 adding one, 16 Multiplier, 8 Q-Multiplier, 7 Q-Adder, CNOT gates, 8 oracle operators, 8 Converter, and Divided by 2.

Therefore, the complexity of the scaling-down circuit of 3-D floating-point data can be calculated as follows:where , .

Conclusions

Quantum computation has become a novel and important tool in the field of image/data processing. In this paper, the trilinear interpolation method for quantum scaling up and down of 3-D floating-point data is proposed for the first time. 3-D data have a wide range of applications in many diverse fields such as artificial intelligence, aeronautics, architecture, biological science, medicine, etc. Floating-point numbers offer great savings in the number of qubits when the required range of values and/or relative precision is large. Therefore, based on QFT, we have designed the addition and multiplication (Q-Adder and Q-Multiplier modules) of 3-D floating-point data. And then, we have proposed a Converter module for converting fixed-point numbers to floating-point numbers. Combining some basic modules in this paper, we can achieve the quantum scaling up and down for 3-D floating-point data. Finally, we have proposed the design scheme of quantum scaling up and down for 3-D floating-point data using trilinear interpolation method based on QFT.

In future work, the design scheme of quantum scaling up and down is extremely helpful for quantum reconstruction theory, such as the reconstruction technology of 2-D to 3-D data. And we can use the reconstruction technology to perform quantum data processing such as medical data reconstruction in future research.