| Literature DB >> 31757019 |
Houquan Liu1,2, Hongchang Deng1,2, Shijie Deng1,2, Chuanxin Teng1,2, Ming Chen1,2, Libo Yuan1,2.
Abstract
Vortex beam encoded all-optical logic gates are suggested to be very important in future information processing. However, within current logic devices, only a few are encoded by using vortex beams and, in these devices, some space optical elements with big footprints (mirror, dove prism and pentaprism) are indispensable components, which is not conducive to device integration. In this paper, an integrated vortex beam encoded all-optical logic gate based on a nano-ring plasmonic antenna is proposed. In our scheme, by defining the two circular polarization states of the input vortex beams as the input logic states and the normalized intensity of the plasmonic field at the center of the nano-ring as the output logic states, OR and AND (NOR and NAND) logic gates are realized when two 1st (1st) order vortex beams are chosen as the two input signals; and a NOT logic gate is obtained when one 1st order vortex beam is chosen as the input signal. In addition, by defining the two linear polarization states (x and y polarization) of the input vortex beams as the two input logic states, an XNOR logic gate is realized when two 1st order vortex beams are chosen as the two input signals.Entities:
Keywords: all-optical logic gates; plasmonic; vortex beam
Year: 2019 PMID: 31757019 PMCID: PMC6955695 DOI: 10.3390/nano9121649
Source DB: PubMed Journal: Nanomaterials (Basel) ISSN: 2079-4991 Impact factor: 5.076
Figure 1The diagram of a single ring plasmonic antenna. (a) is a 3D drawing of the nano-ring plasmonic antenna. (b) is a top view of the nano-ring plasmonic antenna and the coordinates for our calculation.
Figure 2The normalized intensity of the plasmonic field near the center of the nano-ring for (a) input logic states “11”, (b) input logic states “10/01”, and (c) input logic states “00” in the realization scheme of OR and AND logic gates.
OR and AND logic gates.
| Input States of Signal 1 | Input States of Signal 2 | Normalized Intensity of the Center Point |
|---|---|---|
| 1 | 1 | 1 |
| 1 | 0 | 0.25 |
| 0 | 1 | 0.25 |
| 0 | 0 | 0 |
Figure 3The normalized intensity of the plasmonic field near the center of the nano-ring for (a) input state “0” and (b) input state “1” in the realization scheme of NOT logic gate.
NOT logic gate.
| Input States | Normalized Intensity of the Center Point |
|---|---|
| 0 | 1 |
| 1 | 0 |
Figure 4The normalized intensity of the plasmonic field near the center of the nano-ring for (a) input logic states “00”, (b) input logic states “10/01”, and (c) input logic states “11” in the realization scheme of NOR and NAND logic gates.
NOR and NAND logic gates.
| Input States of Signal 1 | Input States of Signal 2 | Normalized Intensity of the Center Point |
|---|---|---|
| 0 | 0 | 1 |
| 1 | 0 | 0.25 |
| 0 | 1 | 0.25 |
| 1 | 1 | 0 |
Figure 5The normalized intensity of the plasmonic field near the center of the nano-ring for (a) input logic states “00”, (b) input logic states “10/01”, and (c) input logic states “11” in the realization scheme of XNOR logic gate.
XNOR logic gate.
| Input States of Signal 1 | Input States of Signal 2 | Normalized Intensity of the Center Point |
|---|---|---|
| 0 | 0 | 1 |
| 1 | 0 | 0.5 |
| 0 | 1 | 0.5 |
| 1 | 1 | 1 |