Literature DB >> 30015988

Synaptic Barristor Based on Phase-Engineered 2D Heterostructures.

Woong Huh1, Seonghoon Jang1, Jae Yoon Lee1, Donghun Lee2, Donghun Lee2, Jung Min Lee2, Hong-Gyu Park1,2, Jong Chan Kim3, Hu Young Jeong4, Gunuk Wang1, Chul-Ho Lee1.   

Abstract

The development of energy-efficient artificial synapses capable of manifoldly tuning synaptic activities can provide a significant breakthrough toward novel neuromorphic computing technology. Here, a new class of artificial synaptic architecture, a three-terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable-barrier tungsten selenide/graphene Schottky diode, termed as a 'synaptic barrister,' are reported. The device can implement essential synaptic characteristics, such as short-term plasticity, long-term plasticity, and paired-pulse facilitation. Owing to the electrostatically controlled barrier height in the ultrathin van der Waals heterostructure, the device exhibits gate-controlled memristive switching characteristics with tunable programming voltages of 0.2-0.5 V. Notably, by electrostatic tuning with a gate terminal, it can additionally regulate the degree and tuning rate of the synaptic weight independent of the programming impulses from source and drain terminals. Such gate tunability cannot be accomplished by previously reported synaptic devices such as memristors and synaptic transistors only mimicking the two-neuronal-based synapse. These capabilities eventually enable the accelerated consolidation and conversion of synaptic plasticity, functionally analogous to the synapse with an additional neuromodulator in biological neural networks.
© 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Entities:  

Keywords:  2D materials; artificial synapse; barristor; heterostructure; memristor; neuromorphic application

Year:  2018        PMID: 30015988     DOI: 10.1002/adma.201801447

Source DB:  PubMed          Journal:  Adv Mater        ISSN: 0935-9648            Impact factor:   30.849


  7 in total

1.  A Photoelectric-Stimulated MoS2 Transistor for Neuromorphic Engineering.

Authors:  Shuiyuan Wang; Xiang Hou; Lan Liu; Jingyu Li; Yuwei Shan; Shiwei Wu; David Wei Zhang; Peng Zhou
Journal:  Research (Wash D C)       Date:  2019-11-11

2.  Semiconductor-less vertical transistor with ION/IOFF of 106.

Authors:  Jun-Ho Lee; Dong Hoon Shin; Heejun Yang; Nae Bong Jeong; Do-Hyun Park; Kenji Watanabe; Takashi Taniguchi; Eunah Kim; Sang Wook Lee; Sung Ho Jhang; Bae Ho Park; Young Kuk; Hyun-Jong Chung
Journal:  Nat Commun       Date:  2021-02-12       Impact factor: 14.919

Review 3.  Memristive Devices Based on Two-Dimensional Transition Metal Chalcogenides for Neuromorphic Computing.

Authors:  Ki Chang Kwon; Ji Hyun Baek; Kootak Hong; Soo Young Kim; Ho Won Jang
Journal:  Nanomicro Lett       Date:  2022-02-05

4.  Flexible synaptic floating gate devices with dual electrical modulation based on ambipolar black phosphorus.

Authors:  Xiong Xiong; Xin Wang; Qianlan Hu; Xuefei Li; Yanqing Wu
Journal:  iScience       Date:  2022-02-18

5.  Rectifying optoelectronic memory based on WSe2/graphene heterostructures.

Authors:  Sung Hyun Kim; Myung Uk Park; ChangJun Lee; Sum-Gyun Yi; Myeongjin Kim; Yongsuk Choi; Jeong Ho Cho; Kyung-Hwa Yoo
Journal:  Nanoscale Adv       Date:  2021-07-20

6.  Simulation of Figures of Merit for Barristor Based on Graphene/Insulator Junction.

Authors:  Jun-Ho Lee; Inchul Choi; Nae Bong Jeong; Minjeong Kim; Jaeho Yu; Sung Ho Jhang; Hyun-Jong Chung
Journal:  Nanomaterials (Basel)       Date:  2022-08-31       Impact factor: 5.719

7.  Low energy consumption fiber-type memristor array with integrated sensing-memory.

Authors:  Yanfang Meng; Jiaxue Zhu
Journal:  Nanoscale Adv       Date:  2022-01-18
  7 in total

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