Literature DB >> 29998730

Visible Light-Erasable Oxide FET-Based Nonvolatile Memory Operated with a Deep Trap Interface.

Taeyoon Kim1,2, Jung Wook Lim1,2, Seong Hyun Lee1, Jeho Na1, Jiwoon Jeong1, Kwang Hoon Jung1,2, Gayoung Kim1,2, Sun Jin Yun1,2.   

Abstract

A new concept of a tunneling oxide-free nonvolatile memory device with a deep trap interface floating gate is proposed. This device demonstrates a high on/off current ratio of 107 and a sizable memory window due to deep traps at the interface between the channel and gate dielectric layers. Interestingly, irradiation with 400 nm light can completely restore the program state to the initial one (performing an erasing process), which is attributed to the visible light-sensitive channel layer. Device reproducibility is enhanced by selectively passivating shallow traps at the interface using in situ H2 plasma treatment. The passivated memory device shows highly reproducible memory operation and on-state current during retention bake tests at 85 °C. One of the most significant advantages of this visible light-erasable oxide field-effect transistor-based nonvolatile memory is its simple structure, which is free from deterioration due to the frequent tunneling processes, as compared to conventional nonvolatile memory devices with tunneling oxides.

Entities:  

Keywords:  nonvolatile memory (NVM); oxide semiconductor; plasma treatment; transistor; visible light

Year:  2018        PMID: 29998730     DOI: 10.1021/acsami.8b07749

Source DB:  PubMed          Journal:  ACS Appl Mater Interfaces        ISSN: 1944-8244            Impact factor:   9.229


  1 in total

1.  Synaptic Transistors Exhibiting Gate-Pulse-Driven, Metal-Semiconductor Transition of Conduction.

Authors:  Jung Wook Lim; Su Jae Heo; Min A Park; Jieun Kim
Journal:  Materials (Basel)       Date:  2021-12-07       Impact factor: 3.623

  1 in total

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