Literature DB >> 29892614

Average output polarization dataset for signifying the temperature influence for QCA designed reversible logic circuits.

Md Abdullah-Al-Shafi1, Ali Newaz Bahar2, Mohammad Maksudur Rahman Bhuiyan3, S M Shamim2, Kawser Ahmed2.   

Abstract

Quantum-dot cellular automata (QCA) as nanotechnology is a pledging contestant that has incredible prospective to substitute complementary metal-oxide-semiconductor (CMOS) because of its superior structures such as intensely high device thickness, minimal power depletion with rapid operation momentum. In this study, the dataset of average output polarization (AOP) for fundamental reversible logic circuits is organized as presented in (Abdullah-Al-Shafi and Bahar, 2017; Bahar et al., 2016; Abdullah-Al-Shafi et al., 2015; Abdullah-Al-Shafi, 2016) [1-4]. QCADesigner version 2.0.3 has been utilized to survey the AOP of reversible circuits at separate temperature point in Kelvin (K) unit.

Entities:  

Keywords:  Average output polarization (AOP); Quantum-dot cellular automata; Reversible logic circuits

Year:  2018        PMID: 29892614      PMCID: PMC5993001          DOI: 10.1016/j.dib.2018.05.009

Source DB:  PubMed          Journal:  Data Brief        ISSN: 2352-3409


Specifications Table Value of the data Reversible circuits are the essential construction block of reversible logic techniques. This dataset aids researcher to improve the consistency and performance of state-of-the-art digital practices. The demonstrated data study can assist the researchers to realize the utmost performing temperature of a distinct QCA circuit. The outlined dataset can be utilized to form lossless and resilient communication system and arithmetic logic unit (ALU) in quantum computers.

Data

This manuscript improve the performance of QCA reversible circuits with separate temperature level. QCADesigner has been applied for all the simulation process. The average output polarization (AOP) for fundamental reversible circuits of Feynman, Double Feynman, Fredkin, Toffoli, Peres, BJN, URG, BVF, MCL, TR, R, NG and SCL gates at separate temperature level is presented in Table 1.
Table 1

Average output polarization dataset of reversible logic circuits at separate temperature levels.

DesignOutputTemperature at K
123456789101112131415
FeynmanA3.4843.4813.4783.4703.4613.4613.4543.4543.4483.4463.4433.1803.1043.0062.960
B3.3843.3813.3783.3723.3673.3613.3573.3543.3543.3483.3433.2203.1103.0122.940
Double FeynmanA3.5163.5033.4993.4983.4933.4843.4663.4473.3843.3103.2393.1533.1123.0893.061
B3.5103.5093.5053.4993.4923.4753.4383.4003.3843.3303.2453.1603.1143.0653.017
C3.5103.5073.5073.5053.5003.4943.4703.4403.4003.3803.3493.1483.0983.0693.011
FredkinA3.5063.5003.5003.4873.4813.4723.4643.4433.4433.4123.3393.1743.1103.0543.011
B3.5063.5003.4983.4873.4783.4703.4503.3323.3243.3073.2953.1493.1083.0783.048
C3.5233.5173.5113.4983.4873.4763.4643.4583.4483.4303.4183.2713.1993.1083.058
ToffoliA3.5153.5073.5033.5003.4973.4903.4723.4403.3903.3403.2703.1783.1093.0523.008
B3.5123.5053.5003.5003.4843.4683.4503.3783.3403.3123.2703.1793.1043.0583.012
C3.5063.5023.5013.5013.4873.4603.4143.3803.3303.3023.2413.1553.0783.0142.968
PeresA3.5113.5043.4893.4813.4703.4493.4283.4193.4063.3943.3803.1803.1143.0783.018
B3.5893.5793.5683.5503.5003.4483.4353.4023.3923.3843.3683.1403.0983.0222.978
C3.5063.5023.5023.4873.4583.4473.4143.3723.3323.3083.2703.1253.0893.0122.971
BJNA3.5053.5003.4953.4823.4763.4613.4473.4113.3913.3503.2023.1783.1103.0663.005
B3.4893.4803.4713.4623.4493.4243.3883.3713.3383.3073.1143.0783.0143.0062.968
C3.4853.4783.4513.4393.3983.3693.3443.3243.2963.2803.0943.0132.9642.9182.872
URGA3.5053.5003.4843.4603.4413.4103.3763.3613.3243.2073.1733.1123.0763.0242.984
B3.5053.4843.4783.4613.4323.4263.3563.3363.3143.1693.1133.0963.0442.9782.867
C3.4773.4693.4493.4313.4123.3973.3723.3613.3503.1583.0883.0142.9542.8722.784
NGA3.5143.5113.5053.5053.4923.4763.4493.3903.3383.3293.2703.1903.1133.0873.011
B3.5003.4963.4913.4803.4683.4503.4383.4193.3753.3183.2823.1443.0953.0042.955
C3.5073.5073.5073.5023.4713.4623.4403.4223.3903.3413.2963.1723.0963.0523.008
MCLA3.5053.5053.4903.4653.4183.3883.3623.3303.3153.2963.2783.1103.0733.0232.870
B3.5073.5053.4783.4603.4343.4103.3853.3483.3353.3183.2903.0703.0042.9882.761
C3.5573.5493.5123.4943.4563.4143.3983.3643.3303.3123.2923.1403.0943.0613.014
TRA3.5143.5103.5063.5013.5013.4883.4703.4403.3453.3223.2473.1723.1123.0873.002
B3.5093.5073.5023.4983.4873.4653.4303.3803.3183.3103.1203.0423.0052.8562.750
C3.5023.5013.5013.5003.4923.4803.4503.4223.3703.3123.2263.1783.0803.0042.856
RA3.5053.5033.5033.4903.4873.4583.4323.4183.3743.3123.2703.2113.1723.0503.002
B3.5153.5153.5103.5053.5003.5003.4883.4563.4123.2603.1973.0903.0022.9462.892
C3.5013.5003.5003.4963.4863.4493.4273.3723.3543.2763.2023.1703.0483.0042.990
BVFA3.5133.5113.5083.5043.5003.4893.4803.4353.3983.3203.2403.1683.0903.0463.002
B3.5183.5153.5123.5103.5023.5003.4943.4783.4183.3803.2703.1993.1023.0763.005
C3.5103.5083.5023.5023.5003.4903.4703.3463.3903.3483.2703.1823.0903.0082.878
D3.5063.5043.5043.5043.4963.4873.4703.4273.3793.3153.2403.1513.0673.0143.008
SCLA3.5183.5143.5103.5063.5063.4993.4873.4403.3963.3463.2903.1983.1123.0743.009
B3.5123.5103.5063.5023.5003.4973.4833.4503.3893.3383.2803.1803.0902.9872.768
C3.5103.5093.5053.5013.5003.4903.4733.4403.3803.3303.2583.1603.0882.8772.678
D3.5083.5063.5003.5003.5003.4883.4643.4323.3803.3203.2413.1483.0963.0022.876
Average output polarization dataset of reversible logic circuits at separate temperature levels.

Experimental design, materials and methods

Analysis of AOP

The AOP is fallen steadily with the growth of temperature [5]. At any particular temperature, the AOP of a QCA cell can be estimated by only taking the variance between highest or maximum polarization and lowest or minimum polarization and dividing the outcome by two. For testing the AOP, QCADesigner engine 2.0.3 has been applied with coherent vector simulation device. The succeeding default factors have been measured. The default factors are listed as: cell size=18 nm, dimension of quantum dots = 5 nm, radius of effect = 65 nm, relative permittivity = 12.90, samples number = 50,000, clock high = 9.8e−22 J, clock low = 3.8e−23 J, layer separation = 11.5 nm, convergence tolerance = 0.001, clock amplitude factor=2.00, and highest iterations for each sample = 100. The graphical depiction of AOP of various reversible circuits organized in [1], [2], [3], [4] is showed in Fig. 1.
Fig. 1

Temperature consequence on average output polarization of (a) Feynman, (b) Double Feynman, (c) Fredkin, (d) Toffoli, (e) Peres, (f) BJN, (g) URG, (h) NG, (i) MCL, (j) TR, (k) R, (l) BVF and (m) SCL circuit.

Temperature consequence on average output polarization of (a) Feynman, (b) Double Feynman, (c) Fredkin, (d) Toffoli, (e) Peres, (f) BJN, (g) URG, (h) NG, (i) MCL, (j) TR, (k) R, (l) BVF and (m) SCL circuit. A relative assessment of AOP by the reversible circuits is organized in Fig. 1.
Subject areaElectronics
More specific subject areaNano-electronics
Type of dataTable, figure
How data was acquiredData set has been attained with QCADesigner tool
Data formatAnalyzed
Data accessibilityData is within this article
  1 in total

1.  Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.

Authors:  Ali Newaz Bahar; Mohammad Maksudur Rahman; Nur Mohammad Nahid; Md Kamrul Hassan
Journal:  Data Brief       Date:  2016-12-29
  1 in total

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