| Literature DB >> 29617112 |
Rui Guo1,2, Yaxiong Zhou3, Lijun Wu4, Zhuorui Wang3, Zhishiuh Lim2, Xiaobing Yan1, Weinan Lin1, Han Wang1, Herng Yau Yoong1, Shaohai Chen1, Thirumalai Venkatesan1,2,5,6, John Wang1, Gan Moog Chow1, Alexei Gruverman7, Xiangshui Miao3, Yimei Zhu4, Jingsheng Chen1,2.
Abstract
Brain-inspired computing is an emerging field, which intends to extend the capabilities of information technology beyond digital logic. The progress of the field relies on artificial synaptic devices as the building block for brainlike computing systems. Here, we report an electronic synapse based on a ferroelectric tunnel memristor, where its synaptic plasticity learning property can be controlled by nanoscale interface engineering. The effect of the interface engineering on the device performance was studied. Different memristor interfaces lead to an opposite virgin resistance state of the devices. More importantly, nanoscale interface engineering could tune the intrinsic band alignment of the ferroelectric/metal-semiconductor heterostructure over a large range of 1.28 eV, which eventually results in different memristive and spike-timing-dependent plasticity (STDP) properties of the devices. Bidirectional and unidirectional gradual resistance modulation of the devices could therefore be controlled by tuning the band alignment. This study gives useful insights on tuning device functionalities through nanoscale interface engineering. The diverse STDP forms of the memristors with different interfaces may play different specific roles in various spike neural networks.Entities:
Keywords: ferroelectric tunnel junctions; memristor; nanoscale interface engineering; spike-timing-dependent plasticity; synapse
Mesh:
Year: 2018 PMID: 29617112 DOI: 10.1021/acsami.8b01469
Source DB: PubMed Journal: ACS Appl Mater Interfaces ISSN: 1944-8244 Impact factor: 9.229