| Literature DB >> 29495480 |
Carlos Alvarado Chavarin1, Carsten Strobel2, Julia Kitzmann3, Antonio Di Bartolomeo4, Mindaugas Lukosius5, Matthias Albert6, Johann Wolfgang Bartha7, Christian Wenger8,9.
Abstract
Graphene has been proposed as the current controlling element of vertical transport in heterojunction transistors, as it could potentially achieve high operation frequencies due to its metallic character and 2D nature. Simulations of graphene acting as a thermionic barrier between the transport of two semiconductor layers have shown cut-off frequencies larger than 1 THz. Furthermore, the use of n-doped amorphous silicon, (n)-a-Si:H, as the semiconductor for this approach could enable flexible electronics with high cutoff frequencies. In this work, we fabricated a vertical structure on a rigid substrate where graphene is embedded between two differently doped (n)-a-Si:H layers deposited by very high frequency (140 MHz) plasma-enhanced chemical vapor deposition. The operation of this heterojunction structure is investigated by the two diode-like interfaces by means of temperature dependent current-voltage characterization, followed by the electrical characterization in a three-terminal configuration. We demonstrate that the vertical current between the (n)-a-Si:H layers is successfully controlled by the ultra-thin graphene base voltage. While current saturation is yet to be achieved, a transconductance of ~230 μ S was obtained, demonstrating a moderate modulation of the collector-emitter current by the ultra-thin graphene base voltage. These results show promising progress towards the application of graphene base heterojunction transistors.Entities:
Keywords: amorphous silicon; graphene; vertical transistors
Year: 2018 PMID: 29495480 PMCID: PMC5872924 DOI: 10.3390/ma11030345
Source DB: PubMed Journal: Materials (Basel) ISSN: 1996-1944 Impact factor: 3.623
Figure 1(a) Schematic illustration of a graphene monolayer (black) embedded by two (n)-a-Si:H layers (the top layer is the emitter and the bottom layer is the collector). Forward-bias output characteristics of the (b) BC (base-collector) and (c) BE (base-emitter) interfacial diodes. Insets: Forward and backward bias of the (b) BC and (c) BE diodes.
Figure 2(a) Temperature dependent IV characteristics from 273 K to 333 K and (b) Richardson plot for the extraction of the base-emitter interface barrier height.
Figure 3(a) versus and (b) versus plot of the forward-bias output characteristics of the BE interface.
Figure 4(a) Collector, emitter and (b) base currents versus . The current dips at corresponds to a leveling of the collector and base Fermi levels ( = 0 V).
Figure 5Simplified band diagrams of the graphene-base heterojunction transistor during (a) equilibrium (BC ideal barrier shown as a dashed line). Band diagram at = 0 V for (b) 0 V < < 0.15 V and (c) > 0.15 , and at ≠ 0 V for (d) > 0.15 . The green arrows indicate the flow of electrons.
Figure 6(a) Base (blue dashed lines) and collector (black solid lines) current versus at constant values of ranging from 0 to 1.5 V in 100 mV steps. Inset: Percentage increase of in function of in respect to at 0 V. (b) Variation of the collector, emitter and base currents extracted at 1.46 in function of the graphene base voltage.