| Literature DB >> 29084255 |
Jianlin Wang1,2, Dan Xu1, Huan Zhou1, Anning Bai2, Wei Lu1.
Abstract
This paper presents an adaption of the fractional order terminal sliding mode control (AFTSMC) strategy for DC-DC Buck converter. The following strategy aims to design a novel nonlinear sliding surface function, with a double closed-loop structure of voltage and current. This strategy is a fusion of two characteristics: terminal sliding mode control (TSMC) and fractional order calculation (FOC). In addition, the influence of "the controller parameters" on the "performance of double closed-loop system" is investigated. It is observed that the value of terminal power has to be chosen to make a compromise between start-up and transient response of the converter. Therefore the AFTSMC strategy chooses the value of the terminal power adaptively, and this strategy can lead to the appropriate number of fractional order as well. Furthermore, through the fractional order analysis, the system can reach the sliding mode surface in a finite time. And the theoretical considerations are verified by numerical simulation. The performance of the AFTSMC and TSMC strategies is tested by computer simulations. And the comparison simulation results show that the AFTSMC exhibits a considerable improvement in terms of a faster output voltage response during load changes. Moreover, AFTSMC obtains a faster dynamical response, smaller steady-state error rate and lower overshoot.Entities:
Mesh:
Year: 2017 PMID: 29084255 PMCID: PMC5662226 DOI: 10.1371/journal.pone.0187152
Source DB: PubMed Journal: PLoS One ISSN: 1932-6203 Impact factor: 3.240
Fig 1DC-DC Buck converter topology.
Specifications of Buck converter.
| Descriptions | Parameters | Nominal values |
|---|---|---|
| Input voltage | Vin | 25V |
| Desired output voltage | Vref | 10V |
| Inductance | L | 260 uH |
| Capacitance | C | 100 uF |
| Load resistance | R | 1~10Ω |
Fig 2The output voltage dynamic response with different γ.
(a) The output voltage dynamic response in start-up; (b) The output voltage dynamic response during load variations.
Fig 3The output voltage dynamic response with adaptive γ.
(a) The output voltage dynamic response in start-up; (b) The output voltage dynamic response during load variations.
Fig 4The output voltage dynamic response with different λ.
Controller parameters of the proposed methods.
| Descriptions | γ | λ | ||
|---|---|---|---|---|
| SMC | 0.8 | 780 | 1 | 1 |
| ATSMC | 0.8 | 780 | adaptive | 1 |
| AFTSMC | 0.8 | 780 | adaptive | 0.7 |
Fig 5The output voltage dynamic response with different strategy.