| Literature DB >> 28494570 |
Yuanyuan Shi1, Qi Zhou2, Anbang Zhang1, Liyang Zhu1, Yu Shi1, Wanjun Chen1, Zhaoji Li1, Bo Zhang3.
Abstract
Conductance method was employed to study the physics of traps (e.g., interface and bulk traps) in the Al2O3/GaN MOS devices. By featuring only one single peak in the parallel conductance (G p/ω) characteristics in the deep depletion region, one single-level bulk trap (E C-0.53 eV) uniformly distributed in GaN buffer was identified. While in the subthreshold region, the interface traps with continuous energy of E C-0.4~0.57 eV and density of 0.6~1.6 × 1012 cm-2 were extracted from the commonly observed multiple G p/ω peaks. This methodology can be used to investigate the traps in GaN buffer and facilitates making the distinction between bulk and interface traps.Entities:
Keywords: Al2O3/GaN MOS channel device; Buffer traps; Conductance method; Interface traps
Year: 2017 PMID: 28494570 PMCID: PMC5423875 DOI: 10.1186/s11671-017-2111-z
Source DB: PubMed Journal: Nanoscale Res Lett ISSN: 1556-276X Impact factor: 4.703
Fig. 1The schematic cross section of the Al2O3/GaN MOS device with full AlGaN-barrier removal
Fig. 2a 1/C 2 -V G characteristic on Al2O3/GaN MOS device measured at frequency of 1 MHz. The dashed dot line is the linear fitting of the linear part of the 1/C 2 -V G curve and the deviation from the linear slope as highlighted in the curves suggesting trap-dominated regions. b Two trap-dominated regions highlighted in the C-V G curve and marked with deep depletion and subthreshold region
Fig. 3Typical frequency-dependent parallel conductance (a) with 0 < V G < 1.5 V (b) with 1.5 V < V G < 2.6 V (subthreshold region) (c) with V G < 0 V (deep depletion region); the dots are the experimental data and the solid lines are fitting curves
Fig. 4a The energy band diagram in depletion region to illustrate the conductance maximum loss induced by buffer traps irrelevant with V G. b Energy band bending in the subthreshold region to illustrate the conductance maximum loss induced by interface traps correlated with V G
Fig. 5Plots of D IT and the interface trap energy level relative to the CB (∆E IT = E C-E IT) for each applied gate voltage in the subthreshold region
Fig. 6Experimental (dotted lines) and fitted (red circles) Gp/ω curves with gate biased in the deep depletion region