Guided CdSe Nanowires Parallelly Integrated into Fast Visible-Range Photodetectors.

One-dimensional semiconductor nanostructures, such as nanowires (NWs), have attracted tremendous attention due to their unique properties and potential applications in nanoelectronics, nano-optoelectronics, and sensors. One of the challenges toward their integration into practical devices is their large-scale controlled assembly. Here, we report the guided growth of horizontal CdSe nanowires on five different planes of sapphire. The growth direction and crystallographic orientation are controlled by the epitaxial relationship with the substrate as well as by a graphoepitaxial effect of surface nanosteps and grooves. CdSe is a promising direct-bandgap II-VI semiconductor active in the visible range, with potential applications in optoelectronics. The guided CdSe nanowires were found to have a wurtzite single-crystal structure. Field-effect transistors and photodetectors were fabricated to examine the nanowire electronic and optoelectronic properties, respectively. The latter exhibited the fastest rise and fall times ever reported for CdSe nanostructures as well as a relatively high gain, both features being essential for optoelectronic applications.

One-dimensional semiconductor nanowires have been extensively studied in recent years, due to their unique characteristics and properties compared with their bulk counterparts.[1] One important property is photoconductivity in which the electrical conduction increases under illumination.[2] This phenomenon has been widely investigated in bulk semiconductors since the middle of the previous century.[3] Owing to their anisotropic geometry, small dimensions, high crystallinity, and high surface-to-volume ratio,[4] the photoconductivity of nanowires is expected to be superior to that of bulk materials. In principle, since nanowires are characterized by a relatively small effective conductive channel, the carrier transit time is reduced, leading to photodetectors with fast photoresponse and high photoconductive gain.[5]

One major challenge toward the integration of nanowires into practical planar devices in general, and specifically into photodetectors, is their controlled large-scale assembly. In most cases, postgrowth processes are required in order to integrate the nanowires into functional devices. To this end, several methods have been devised, including the use of electric[6] and magnetic[7] fields, fluidic alignment,[8] Langmuir–Blodgett technique,[9]etc. Although extensive efforts have been made to improve these postgrowth methods, their ability to control the position, direction, and length of each nanowire, as required for parallel integration, is still limited. Moreover, additional fabrication steps might damage the nanowires.

An alternative strategy for the large-scale integration of nanowires is their direct guided growth with controlled orientations.[10−17] In this bottom-up approach, the vapor–liquid–solid (VLS) growth and the assembly of the nanowires are combined into one single step, thus eliminating the need for postgrowth processes to produce well-aligned horizontal nanowires as illustrated in Figure A. By applying the guided growth approach, one can control not only the growth location and direction but also the crystallographic orientation of the grown nanowires. As demonstrated in Figure B, those parameters can be controlled by three guiding modes: (a) epitaxial relationship between the wire and flat substrate, as well as by a graphoepitaxial effect along surface, (b) nanogrooves, and (c) nanosteps. Graphoepitaxy, in contrast to the more classical commensurate epitaxy, usually refers to the incommensurate orientation of crystals[18] or periodic molecular assemblies[19] by relief features of the substrate, such as steps or grooves, which can be significantly larger than the lattice parameter. This concept has been extended from inorganic materials to the contexts of bock-copolymers[19] and colloidal self-assembly[20] and more recently to those of nanotubes[21] and nanowires.[12] Guided growth of nanowires can provide the high crystallinity and quality required for high-performance optoelectronic devices.[22] This reproducible growth can be easily combined with top-down lithography processes to fabricate nanowire-based devices in a parallel manner on a large scale.[23]

Figure 1

Guided growth of horizontal CdSe nanowires. (A) Schematic illustration of vertical VLS growth (left) vs guided horizontal growth (right). (B) Three modes of guided growth (HRTEM cross-section images and their schematic illustration): (a) epitaxial growth along specific lattice directions, (b) graphoepitaxial growth along V-shaped nanogrooves of an annealed unstable low-index substrate, and (c) graphoepitaxial growth along L-shaped nanosteps of an annealed miscut substrate. (C) (a) Guided CdSe NWs grown on annealed M (101̅0) sapphire. (b) Magnification of the guided NWs from image (a).

In order to exploit the guided growth approach for optoelectronic applications, it must be extended to materials with wide coverage of bandgap energies, especially in the visible range. Recently, our group reported the guided growth of horizontal zinc selenide (ZnSe) nanowires.[22] It broadened the repertoire of horizontal nanowires to a material with band gap energy in the blue-UV range. However, a more compatible II–VI semiconductor for optoelectronics is cadmium selenide (CdSe), with a direct bandgap of 1.74 eV, and its absorption spectrum covers most of the visible solar radiation range. Therefore, it has attracted great research attention and has been considered promising in many fields[24] especially for solar energy conversion and optoelectronic applications.[25] Recently, Penner et al.(26) reported a photodetector based on nanocrystalline CdSe nanowires arrays showing fast response times at a range of 20–40 μs but with relatively low gain (0.032–0.050). For single-crystalline CdSe nanowires, Wang et al.(27) reported a photodetector showing rise and decay time constants of 34 and 230 μs, respectively. Other reports on single-crystal CdSe nanowires show responses times at the millisecond scale.[28−30] For other CdSe nanostructures, such as nanobelts, shorter response times have been achieved with a minimal value of 15 μs and high gain (∼102–103).[5,31]Table S1 summarizes those and other[32−36] reported values for comparison with our results.

Here, we report the guided horizontal growth of single-crystal CdSe nanowires and their parallel integration into photodetectors with rise and fall times as short as 2 μs. These are, to the best of our knowledge, the fastest photodetectors based on CdSe nanostructures reported so far. Furthermore, the photodetectors showed relatively high gain, in the order of 102. The guided growth is demonstrated on five different flat and faceted planes of sapphire (α-Al2O3), displaying all the three modes of guided growth previously described (Figure B). Using a focused ion beam (FIB), thin lamellas were sliced across the nanowires and observed under a high-resolution transmission electron microscope (HRTEM) to characterize the growth direction and crystallographic orientation of the grown nanowires and their epitaxial relation with the substrate. We also examined their optical properties using photoluminescence (PL) measurement, and fabricated field-effect transistors to characterize their electrical properties. Finally, by fabricating nanowires-based photodetectors we measured the fast optoelectric dynamics, and estimated their responsivity (Rλ), defined as the electrical output per optical input, and their photoconductive gain (G), which is defined as the ratio between the number of collected electrons to the number of absorbed photons.

Results and Discussion

We studied the guided growth of horizontal CdSe nanowires on five different planes of sapphire: three flat surfaces A(11̅20), R(1̅120), and C(0001) to demonstrate epitaxy-governed growth and two faceted surfaces to demonstrate graphoepitaxial growth, annealed M (1̅010) with nanogrooves and annealed miscut C (0001) tilted by 2° toward [11̅00] featured nanosteps. The synthesis was carried out in a quartz tube within a two-zone horizontal tube furnace. Au catalyst islands were patterned by photolithography followed by either electron-beam evaporation of a thin (8 Å) layer and dewetting at elevated temperature or by dispersion of purchased 10 nm nanoparticles. High-purity CdSe powder was the source for the two precursors. It was placed in a quartz crucible which was heated and kept at 800 °C in the middle of the first zone, while the sapphire samples were placed downstream at the second zone. A mixture of 90% N2 and 10% H2 was used as a carrier in a total flow of 500 sccm. In a typical synthesis, the samples were heated to 600 °C, and the pressure was set to 400 mbar. The synthesis duration was 20–40 min; afterward, the furnace was allowed to naturally cool down. The synthesis results were aligned by horizontal growth of CdSe nanowires bound to the sapphire surface as well as by vertical growth of CdSe nanowires from the catalyst islands. The vertical nanowires were removed by 10 s of mild sonication in isopropyl alcohol. The nanowires have a typical diameter of 60–120 nm, and their length was up to 30 μm. All of the guided nanowires had a wurtzite structure, with a stoichiometric ratio of Se and Cd atoms (1.00:1.03), measured with energy-dispersive X-ray spectroscopy (EDS, Figure S1). The crystallographic orientation and the growth direction of the grown nanowires varied with the different orientations of the sapphire substrates, as summarized in Table , and detailed in the next paragraphs.

Table 1

Crystallographic Orientation and Growth Direction of Guided CdSe NWs Grown on Different Sapphire Planesa

substrate orientation	no. of growth directions	no. of NWs	crystal phase	horizontal CdSe∥sapphire	transversal CdSe∥sapphire	axial direction CdSe∥sapphire	minimal mismatch transversal (%)	minimal mismatch axial (%)
C-plane (0001)	6	4	WZ	(0001)∥ (0001)	(112̅0)∥(12̅10)	[11̅00]∥[101̅0]	–0.46	–0.46
		3	WZ	(1̅101)∥ (0001)	(112̅0)(12̅10)	[11̅02]∥[101̅0]	–0.46	22.93
A-plane (11̅20)	6	7	WZ	(0001)∥ (112̅0)	(112̅0)(11̅08)	[11̅00][44̅01]b	5.14	5.15
R-plane (11̅02)	4	7	WZ	(101̅0)∥ (112̅0)	(1̅21̅0)(11̅04)	[0001][22̅01]b	–1.15	–0.87
Annealed M-planè	2	3	WZ			[12̅10]∥ [12̅10]
		2	WZ			[12̅13]∥ [12̅10]
		1	WZ			[12̅12]∥ [12̅10]
Annealed Miscut C-plane	2	6	WZ			[XXXX]∥[12̅10]c

For the epitaxial growth, the calculated minimal lattices mismatch is added.

These nanowires were all from the same lamella across the sapphire, and had the same orientation of the CdSe. It is possible that nanowires grown along different directions of the sapphire have different crystallographic orientation.

XXXX indicates various different crystallographic indices.

Guided Growth of CdSe Nanowires on Different Planes of Sapphire

On a flat C (0001) sapphire, the guided CdSe nanowires grow along six isomorphic M ⟨101̅0⟩ directions, as previously was shown for GaN nanowires[37] and ZnSe nanowires,[22] reflecting the 3-fold symmetry of the substrate (Figure A). The growth axis of the nanowires is along two crystallographic orientations [11̅00] and [11̅02]. In both cases, the plane across the nanowire, which we refer to as transversal, is (112̅0), and the transversal plane of the sapphire substrate is also (12̅10). This means that the transversal mismatch is the same for both orientations of growth, whereas the longitudinal mismatch is different, as summarized in Table S2. This might imply that the transversal mismatch is dominant in determining the crystallographic orientation of guided nanowires as was previously suggested by Nikoobakht et al.(38) The nanowires that grow along the crystallographic orientation [11̅00], are oriented so that their c-axis perpendicular to the surface, as was previously reported for CdSe films grown on C-plane sapphire.[39] On annealed miscut C (0001) tilted by 2° toward [11̅00], the CdSe nanowires are guided along the direction of the L-shaped nanosteps, and their growth direction is ± [12̅10]. As already shown in all of our previous studies,[12,13,22] graphoepitaxial guidance overrules the epitaxial guidance. The crystallographic orientations of the nanowires on miscut C-plane varied. This is not surprising, in the light of the findings in our previous works, because they were guided by the nanosteps so they had to simultaneously accommodate to two different planes of the substrate.

Figure 2

Guided growth of horizontal CdSe nanowires on different planes of sapphire. (A–C) Epitaxial guided growth of CdSe NWs on a flat sapphire substrate. (D, E) Graphoepitaxial guided growth of CdSe NWs on faceted sapphire substrate. For each substrate: (a) schematic illustration of the directional growth; (b) SEM image of the guided CdSe NWs; (c) HRTEM cross-section image of a NW, marked with the crystal planes and direction of the NW (yellow) and the sapphire substrate (blue); (d) magnification of the NW–surface interface from the HRTEM image and its selected area fast Fourier transform.

Guided CdSe nanowires grow on flat R (11̅02) sapphire along four different directions ±[202̅1̅] and ±[02̅21̅], separated by an angle of 94°. The nanowires grow along the polar [0001] crystallographic orientation (Figure B). These results are similar to our previous report for guided ZnSe nanowires.[22]

Another example of epitaxial growth was observed on flat A (112̅0) sapphire. The guided CdSe nanowires grow along six directions separated by around 60° angles, ±[4̅401], ±[2̅201̅], and ±[1̅104] (Figure C). Four out of the six directions were previously reported for ZnSe nanowires on the A plane at temperatures higher than 700 °C.[22] The nanowire crystallographic orientation was [11̅00].

On a flat M (101̅0) sapphire, horizontal growth of CdSe nanowires was seen, but without specific preferred directions (Figure S3). However, since M sapphire is thermodynamically unstable it undergoes faceting at elevated temperatures,[40] and well-aligned graphoepitaxial growth is obtained along the emerging nanogrooves (Figure D). The crystallographic orientation of the nanowires on annealed M plane is not uniform, and three different growth orientations were found: [12̅10], [12̅13], and [12̅12].

Optical Characterization

Room-temperature photoluminescence measurements were performed under excitation by a 532 nm laser (frequency-doubled Nd:YAG) on a single CdSe nanowire grown on annealed M-plane sapphire (Figure ). The measurement was done using a micro-Raman/micro-PL system (Horiba LabRAM HR Evolution). Only a single peak is observed indicating high crystallinity of the nanowire. The peak is centered around 710 nm, which is consistent with the band gap of bulk CdSe (1.74 eV)[41] and ascribed to the near band-edge emission of the nanowire, without size quantization effects. Its full width at half-maximum (33 nm) is relatively narrow compared to previous reports for single-crystal CdSe nanowires,[42] also indicating the high crystallinity of the nanowire, although the peak has a slightly asymmetric line shape, fitting to two Lorentzians give maxima at 711 and 696 nm, which is no more than 5 nm apart (Figure S5). It is not clear if this is due to two slightly different emissions or a marginally asymmetric one. The small spikes around 690 nm belong to the sapphire substrate. The fact that no size quantization (i.e., blue shift) is observed is consistent with the diameter range (60–120 nm), which is much larger than twice the radius of the Bohr exciton for bulk CdSe (5.4 nm).[24] In principle, we could produce thinner nanowires in the quantum-size regime by using small-diameter Au nanoparticles as catalysts, as previously done in our group for ZnO nanowires.[13]

Figure 3

Typical room-temperature PL spectrum of a single CdSe NW on an annealed M-plane sapphire, excited by 536 nm laser (black), and the sapphire substrate (red).

Electrical Characterization

We characterized the electronic properties of the horizontal CdSe nanowires by fabricating field-effect transistors (FET) with top gates (Figure A inset). We chose samples grown on annealed M sapphire because they have the strongest alignment and highest yield. Due to the great control over the exact location and growth direction of the nanowires, the FETs were fabricated using parallel steps only. Each device was built on an array of ∼25 guided nanowires, with an average diameter of ∼100 nm. Using photolithography and electron-beam evaporation, Cr/Au (5/50 nm) electrodes were deposit separated by 5 or 8 μm gaps. Atomic layer deposition (ALD) was used to deposit a 50 nm dielectric layer of Al2O3, followed by fabrication of Cr/Au (5/50 nm) gate electrode as described previously. In Figure A, a typical two-terminal electrical measurement is shown, performed by applying a source–drain bias (VSD) and recording the ISD – VSD curves at different gate voltages (Vg). The linear tendency at low VSD indicates that the contact between the electrodes and the nanowires has an ohmic behavior within the measurement range. Measurements at higher VSD ranges and Vg were also performed (Supporting Information) but often resulted in electrical breakdown. The nanowires display n-type behavior, with charge carrier mobility (μ) ranging from 10–2 to 10–3 cm2 V–1 s–1. The mobility was extracted from the transconductance (gm), as given by eq , where L is the nanowire channel length and C is the capacitance, which was calculated using a quasicircular cross-section approximation given by eq . Herein, ε and ε0 are the dielectric layer and vacuum permittivity constants, respectively, h is the dielectric layer thickness, and r is the radius of the horizontal CdSe nanowire. The transconductance is estimated from the slope of the linear part of the ISD – Vg curves. Actual mobility values may be higher if we could eliminate the effect of contact resistance, since they were obtained from two-terminal measurements (see the Experimental Methods). The charge carrier concentration (ne) was calculated from the threshold voltage (Vth) using eq and was found to be ne = (2.7 × 1018) – (4.8 × 1018) cm–3. Both our μ and ne values are in the range of those reported for other CdSe nanowires.[29,33,43] Specifically, reported μ values range between 1.9 × 10–4 cm2 V–1 s–1 (ref (43)) and 0.77 cm2 V–1 s–1 (ref (29)). These values are much smaller than that of bulk CdSe,[44] μ = 650 cm2 V–1 s–1. The mobility of semiconductor nanowires is often lower than that of the bulk material by orders of magnitude due to surface scattering, scaling roughly linearly with the nanowire diameter.[45] Reports also show that the mobility of semiconductor nanowires can be significantly increased by surface passivation.[46]

Figure 4

Performance of a typical field-effect transistor based on CdSe NWs. (A) ISDvsVSD at different gate voltages. Inset: SEM image of NWs based FET; electrodes are colored and marked. (B) ISDvsVg at different bias voltages. The slope of the linear part of each curve is the transconductance.

Optoelectronic Measurements

In order to characterize the optoelectronic properties of the guided nanowires, we fabricated photodetectors based on them. Each device was built on an array of 5–12 parallel nanowires by fabricating Cr/Au (5/50 nm) electrodes with 5 μm gap. A typical device can be seen in Figure A. We used a 473 nm wavelength laser to illuminate the samples and investigate the change in the photocurrent at different laser powers and in dark (Figure B). As expected, in all measured devices, the photocurrent increases with the increase in the laser power density, revealing high sensitivity with on–off ratios ranging (1.6 × 103) – (5.6 × 105), at 2 V bias, under illumination of 1.5 × 103 mW/cm2. Another important parameter in the characteristics of photodetectors is the photoresponse speed. The rise time is defined as the time required for the photocurrent to increase from 10% to 90%, and the fall time is defined vice versa.[47] To measure the expected fast response of the photodetectors, we used an acousto-optic modulator (AOM) to shift the laser beam on and off the device, achieving fast laser reaction (<200 ns). The light-switching frequency was controlled with a function generator. At 10 V bias and with laser power densities higher than 100 mW/cm2, we measured both rise and fall times in the range of 2–3 μs. In Figure C one on/off cycle of a typical device with illumination power density of 520 mW/cm2 at 10 kHz and 2 V bias is displayed, revealing rise and fall times of 2.3 and 2.5 μs, respectively. All of the devices show high repeatability and stable results during the measurements, even after a few months of storage.

Figure 5

Performance of a typical photodetector based on CdSe guided nanowires. (A) SEM image of NWs based photodetector on which the displayed results were measured. The two electrodes are colored and marked. (B) I–V curves at different 473 nm laser power density illumination and in the dark. (C) One cycle of rise and fall (at 10 kHz, 2 V bias, and 520 mW/cm2). The fitting curves for the single exponential rise and the biexponential decay are marked in purple and green, respectively. (D) Reproducible on/off switching (at 10 kHz, 10 V bias, and 1.5 × 103 mW/cm2). (E) Photocurrent as a function of the laser power density, fitted with a simple power law I = APθ. (F) Rise and fall time as a function of the laser power density (at 10 kHz, and 2 V bias).

Two other important parameters of a photodetector are its current responsivity (Rλ) and the photoconductive gain (G). The responsivity is defined as Rλ= ΔI/PS, where ΔI is the difference between the photocurrent (Iphoto) and dark current (Idark), P is the laser power density, and S is the effective illumination area (estimated by the electrode gap × nanowires diameter × number of nanowires).[47] The photoconductive gain is defined as G = ℏcRλ/eλ, where ℏ is Planck’s constant, c is the speed of light, e is the electron charge, and λ is the laser wavelength.[47] In our measurements on 10 different devices, the responsivity ranges from 14 to 347 A/W and the gain ranges from 36 to 911, corresponding to previously reported values (Table S1). Both responsivity and photoconductive gain decrease with the increase in the laser power density (Figure S7). A simple power law function, Iphoto = APθ, is often fitted to the photocurrent dependency on the laser power density,[32] as demonstrated in Figure E. In this function, A is a constant depending on the wavelength, and exponent θ determines the photocurrent response to the laser power. The fitting curve for our data gave θ equals 0.77, which fits well with previous publications for CdSe nanoribbons[32] and nanowires.[48] Since we measure in a different wavelength than the other citations, our similar results support that the photocurrent response to laser power does not depend on the laser wavelength, as was suggested previously.[32] This fractional power dependency, successfully modeled by Rose,[49,50] is attributed to a complex process of electron–hole generation, trapping, and recombination within the semiconductor. Rose suggested that the lifetime of a free carrier becomes shorter at higher light intensities. When a semiconductor material is illuminated, it is no longer in a thermal equilibrium state, and two quasi-Fermi levels are induced: one for electrons and another for holes. As the light intensity increases, these Fermi levels are pulled apart toward their respective band edges, embracing more ground states (states lying between the two quasi-Fermi levels). Then, shallow trap states are converted to ground states and act as new recombination centers causing a decrease in the lifetime of free carrier. In Figure F the dependency of the rise and fall times at increasing laser power is presented. A clear decrease of the response times as a function of the laser power density is observed, as predicted by the Rose theory. At laser power densities higher than 300 mW/cm2, the rise and fall times remain virtually unchanged, reaching a plateau. The photocurrent tendency was further analyzed and fitted to exponential curves. The rise region was well fitted to a single exponential: Iphoto = Iphoto,0[1 – exp(−t/ τr)]. Here, Iphoto,0 is the maximum photocurrent, t is the time, and τr is the rise time constant. The fall region was well fitted to a biexponential, Iphoto= Iphoto,0[exp(−t/ τd,fast) + exp(−t/τd,slow)], where τd,fast and τd,slow are two time constants for the fast and slow components of the photocurrent decay, respectively. The exponential fitting curves are marked in Figure C, with time constants equal to τr = 1 μs, τd,fast = 1 μs, and τd,slow = 6 μs. The observation of two decay time constants may indicate the existence of two different processes as implicit from the Rose theory: fast recombination of free photocarriers and slower carrier untrapping,

We attribute the fast response times of our photodetectors not only to the high laser power but also to the high crystallinity of our nanowires, which reduces the number of traps states caused by defects. To further examine and confirm the high crystallinity of the guided nanowires, we cut a lamella along the nanowire growth axis. As seen in Figure S8, the nanowires are indeed single crystal, and only a few crystal defects were observed, around one per micrometer. Another possible reason for our outstanding results is directly related to the use of the guided growth approach: since the nanowires grow in the same locations where they are later integrated into devices, and minimal processes were carried out, they remain chemically pristine and hence maintain their intrinsic performance at the optimum. Furthermore, mechanical damage and adhered contamination resulting from postgrowth processes are prevented.

Conclusions

In summary, we have demonstrated the guided growth of aligned horizontal CdSe nanowires on five different plans of sapphire. We characterized their crystallographic structure and orientation as well as their optical and electrical properties. The nanowires were found to have wurtzite crystal structure, high crystallinity single crystal lattice, and n-type behavior. Photodetectors based on these guided nanowires were fabricated and examined, revealing fast optoelectronic response and relatively high gains. These response times are the fastest among all CdSe nanostructures based photodetectors reported so far. These results demonstrate that guided nanowires are promising candidates for high-performance optoelectronic applications. We attribute the high performance of our CdSe nanowires to this growth approach resulting in high-quality, single-crystal, aligned nanowires, which can be easily assembled into devices without the need for postgrowth manipulation.

Experimental Methods

CdSe Nanowires Synthesis

CdSe nanowires were synthesized in a home-built two-zone horizontal tube furnace via a VLS growth process. CdSe powder (99.99%, Sigma-Aldrich) was placed in the hot center of the first furnace. Sapphire wafers coated with a photolithography pattern of 8 Å evaporated gold or 10 nm gold nanoparticles (<12% variability in size and shape, Sigma-Aldrich) were used as growth substrates and catalyst and were placed downstream at the second zone of the furnace around 40 cm away from the CdSe source powder. The tube was initially pumped down to a base pressure of about 4–6 mbar. With the flow of 50 sccm hydrogen and 450 sccm nitrogen gases, the hot center of the first furnace was heated to 800 °C and the second furnace was held at 600 °C. Growth time was typically 20–40 min with a pressure of 400 mbar. After that, the furnace was allowed to naturally cool down.

Structural Characterization

The morphology of as-grown samples was observed by a scanning electron microscope (Supra 55VP FEG LEO Zeiss). In order to analyze the crystallographic structure, orientation, and epitaxial relationships of the nanowires, a focused-ion beam (FIB, FEI Helios 600 dual beam microscope) was used to cut thin (70–90 nm) lamellae across the nanowire, which were later observed under a high-resolution transmission electron microscope (HRTEM, FEI Tecnai F30). The HRTEM images were analyzed using fast Fourier transform (FFT) from selected areas across the nanowire, and the FFT peaks were fitted to the crystallographic tables of bulk CdSe. Compositional analysis was performed by STEM-EDS measurements on a FEI Tecnai F20 microscope.

Device Fabrication

A photolithography mask compatible with the catalyst pattern was used to define the electrodes pattern and their gap. Cr/Au (5/50 nm) source/drain electrodes were deposited over the guided nanowires, separated by 5 or 8 μm gaps, using electron beam deposition. Up to this point, photodetectors were fabricated. In order to fabricate the FET, a 50 nm dielectric layer of Al2O3 was deposited on the samples by atomic layer deposition (Fiji TM) flowed by fabrication of a Cr/Au (5/50 nm) gate electrode and repeated using the same fabrication steps.

Electronic and Optoelectronic Measurements

Both the electronic and optoelectronic measurements were done under vacuum at room temperature using a Janis ST-500 probe system with a Keithley 4200-SCS. The electrical measurements were done under ambient light conditions. In the optoelectronic measurements we used a 473 nm laser to illuminate the devices, with power controlled by a metallic neutral density filter (Thorlabs). An acousto-optic modulator (AOM) was used to shift the beam on and off the device in order to perform on/off measurements with a response time of <200 ns.