Measurement of the across-plane conductivity of YSZ thin films on silicon.

Across-plane conductivity measurements on ion conducting thin films of a few ten nanometers thickness are challenging due to frequently occurring short-circuits through pinholes in the layer. In this contribution, a method is proposed which allowed across-plane conductivity measurements on yttria stabilized zirconia (YSZ) layers with thicknesses as low as 20 nm. YSZ layers were prepared onto silicon substrates with a thin native silica interlayer and the across-plane conductivity was measured on circular microelectrodes by impedance spectroscopy. The silica interlayer exhibits strongly blocking behavior, which helps to avoid short-circuits through pinholes. Different relaxation frequencies of YSZ and silica make separation of these layers possible. An equivalent circuit is suggested, which allows extraction of YSZ properties, and its validity is proven by varying microelectrodes size and layer thickness. All parameters yield the expected behavior.

Introduction

Ion conduction in dimensionally reduced systems such as thin films has become a highly active research area with applications, for example, in sensors [1] or micro solid oxide fuel cells (SOFC) [2]. Numerous studies have been performed on yttria stabilized zirconia (YSZ) [3], [4], [5], [6], [7], [8], [9], [10], gadolinium doped ceria (GDC) [3], [11], [12], [13], [14] and other oxides. One reason for modified properties in thin films is the fact that they often consist of nanocrystalline grains and thus exhibit a high density of grain boundaries; grain boundary properties may also differ from those in micro-crystalline solids. Partly even more important is the conductivity along the interface to the substrate: for example, structural effects such as lattice mismatch between substrate and thin film may lead to increased ionic conductivity. In a recent theoretical study, an enhancement of ionic conductivity at YSZ/SrTiO3 interfaces of up to three orders of magnitude was predicted for 400 K [15]. Modified interfacial conductivities should be reflected in thickness dependent averaged film conductivities. In some papers it was indeed demonstrated that the conductivity of YSZ increases when the layer thickness decreases [16], [17], while others did not notice any effect of the layer thickness [18]. All together, it can be concluded that ion conduction in films of nanometer-size thickness is still not well understood.

Most studies on the ionic conductivity of thin films dealt with the in-plane ion transport [16], [18]. However, textured layers can be expected to exhibit a conductivity anisotropy: the effective in-plane conductivity is most probably affected by grain boundary resistances and the film–substrate interface may contribute as a parallel conduction path. Across-plane conductivity measurements of columnar structured thin films should mainly represent the conductivity of the grain bulk (in case of blocking grain boundaries) and are less affected by fast interfacial conduction. Moreover, for in-plane measurements ion conducting layers are usually prepared on highly resistive substrates (e.g. sapphire), while for investigating the across-plane conductivity, the layers have to be deposited onto substrates with higher conductivity (e.g. platinum). In the latter case, layers often have to be prepared with sufficient thickness, because pores or pinholes [19] can easily lead to short-circuiting in the film.

In this contribution, an across-plane conductivity measurement method is proposed for investigating very thin layers. Thin YSZ films were prepared by pulsed laser deposition (PLD) onto silicon substrates with native silica interlayer. Such an interlayer is highly resistive and helps to avoid possible short-circuits. An equivalent circuit is suggested, which allowed separation and determination of across-plane properties of YSZ layers as thin as 20 nm. The temperature dependent ionic conductivity of differently thick YSZ films is compared to the bulk conductivity of a polycrystalline YSZ sample.

Experimental

YSZ targets were prepared from 8 Mole % Y2O3 doped ZrO2 powder (Tosoh, Japan). Pressed pellets were sintered at 1200 °C for 10 hours and then polished. YSZ thin films were prepared by PLD onto silicon (100) substrates. The native silica layer on silicon was not removed before deposition of the YSZ layer. During the PLD process, the silicon substrates were heated to a temperature of 600 °C (measured by an IR pyrometer). The YSZ films were deposited in oxygen ambience (0.04 mbar) by using an eximer KrF laser (248 nm) (“Lambda Physik”, Germany) with a beam spot size of 7 mm2. The repetition rate was 5 Hz, the fluence of the beam was approximately 2 J/cm2 on the rotating YSZ target. A distance of 6.3 cm between the target and the substrate was used, leading to a deposition rate of about 3 nm/min. YSZ layers of 20–90 nm thickness were prepared by varying the deposition time. The thickness of the layers was determined from scanning electron microscope (SEM) FEI FEMTA 200F cross section images. X-ray diffraction measurements were performed on a PANalytical X'Pert PRO system, with primary and secondary Soller slits of 0.04 rad, a fixed divergence slit of 0.5°, a fixed antiscatter-slit of 1°, measuring time 30 min, 5–135° in 2Θ°, Cu Kα radiation, X'Celerator detector with Ni Kβ filter (scan length ca. 2.55°). The width of the grain columns in the layers was estimated by atomic force microscopy (AFM) (NanoScope V, Bruker Nano).

For the conductivity measurements, circular microelectrodes of different diameters (200, 100 and 80 μm) were prepared on the YSZ thin films. A gold layer (400 nm thickness) was deposited on a chromium adhesion layer (20 nm thickness) by magnetron sputtering and then micro-patterned by UV lithography. Painted silver paste on the bottom of the silicon substrate served as counter electrode. Electrical properties of the resulting samples were measured by impedance spectroscopy (Novocontrol Alpha) in a frequency range from 1 Hz to 1 MHz with an amplitude of 1 V at temperatures between 200 °C and 450 °C. The impedance measurements were performed on a micro-measurement stage, equipped with microscope, heating table and micromanipulators [20], [21], [22]. For contacting the microelectrodes, tungsten needles (tip diameter 1 μm) were used. Fitting and simulation of the impedance spectra was accomplished with ZView software (Scribner).

Results and discussions

The XRD patterns (Fig. 1) demonstrate the crystallinity and major orientation of YSZ films synthesized onto the silicon substrate. Dominating (111) crystallite orientation of YSZ can be observed for the thinnest layer (20 nm) with an additional (001) orientation. According to literature, the deposition parameters used in our case can be expected to lead to a columnar microstructure [3], [19], [23]. The column size was estimated from AFM micrographs and values of approximately 30 nm resulted for all layers (Fig. 2a, c, e). According to SEM cross section images (Fig. 2b, d, f), the YSZ thin films exhibited thicknesses of 20 nm, 55 nm and 90 nm.

Fig. 1

XRD diffraction patterns of YSZ thin films with different thicknesses (*—indicates the peak which is an artifact of the silicon substrate).

Fig. 2

AFM micrographs of YSZ films with different thicknesses (a: 20 nm, c: 55 nm, e: 90 nm) and SEM back scattering images of the cross sections of these thin films (b, d and f).

A sketch of the measurement setup is shown in Fig. 3. Typical impedance spectra in the complex impedance plane are given in Fig. 4a. A strong blocking effect is found in such across-plane conductivity measurements, particularly at lower temperatures. At higher temperatures, the spectra become more semicircle-like. It will be discussed in more detail below that this part of the impedance spectra can be ascribed to the silica interlayer. However, in addition to the silica impedance, a pronounced high frequency shoulder is also visible (Fig. 4b). This contribution can be attributed to the YSZ layer as will be proven below. These two features are even better visible and separable in the modulus (M) plot (Fig. 4c), M = iωZ with ω denoting the angular frequency. Low temperature impedance measurements exhibit the beginning of a vertical line in the high frequency part of the modulus plot. This part of the spectrum, also visible as a high frequency intercept in the complex impedance plane, could be observed for measurements up to 300 °C and reflects the serial resistance of the silicon substrate. The related features are also observed in the Bode plot of the phase angle (Fig. 4d).

Fig. 3

Sketch indicating the sample set-up and the equivalent circuit used to quantify the impedance spectra.

Fig. 4

Impedance spectra measured in the temperatures range from 200 °C to 450 °C (frequency range: 1 MHz–1 Hz, electrode diameter: 200 μm, 90 nm YSZ film thickness). b) High frequency part of each impedance spectrum. c) Modulus plots. d) Bode plots of the phase angles.

Hence, we suggest the equivalent circuit given in Fig. 3 to quantify impedance spectra of such across-plane measurements. One RC element (RYSZ, CYSZ) is attributed to the YSZ layer resistance and capacitance. A second serial RC element (RSiO, CSiO) describes the silica interlayer and a final serial resistor (RSi) represents the electron conduction in the silicon substrate. The high frequency part of low temperature spectra is further affected by an inductance of the order of 10− 5 H (Fig. 4c, silicon part). This was described by a serial inductive element (L) and can be attributed to the electrical wiring. Additional elements due to electrode effects are not required, most probably because electrodes only affect results at frequencies lower than those used here. Non-idealities were taken into account by using constant phase elements (CPE) instead of capacitances in the equivalent circuit. The suggested model fits to all experimental data of this study and in the following we discuss the appropriateness of the interpretation of all the circuit elements.

The conductivity values of the silicon substrate σSi were evaluated from RSi according to the spreading resistance formula [24], [25]where dme is the diameter of the gold microelectrodes. The temperature (T) dependent conductivity values are represented in an Arrhenius plot (Fig. 5). Despite some variations between the different samples, the resulting conductivity is in reasonable agreement with the conductivity of intrinsic silicon, which was calculated from σ = 1/(A·exp(Ea/2·k·T)) [26], where A is a constant (1.1 × 10− 4 Ω·cm), Ea the activation energy (1.12 eV) and k Boltzmann's constant, see Fig. 5. Deviations may partly originate from the fact that at most a few experimental points in the impedance spectra represent the serial silicon resistor. Extrapolation is required, particularly at high temperatures and fitting errors become so large that above 300 °C the serial resistor was not further used in the equivalent circuit when fitting the measured data.

Fig. 5

Arrhenius plot of conductivities of silicon and silica determined from across-plane measurements with varying YSZ film thickness (electrode diameter of 200 μm).

The low frequency RC element is attributed to the silica interlayer. Silica is well known as an insulating material with a very large band gap and some residual ionic conductivity at higher temperatures, which often can be attributed to sodium impurities [27]. At temperatures below 300 °C the resistance becomes so high that its determination was not possible from the available impedance data and in the equivalent circuit the silica layer was represented by a capacitor only. The resulting conductivity of silica is shown in Fig. 5. From the constant phase elements with impedance (i·ω)−·Q− 1 replacing the capacitors in Fig. 3, the capacitance was evaluated by the equation [28]where n and Q are fit parameters. The parameter n was very close to 1, which indicates an almost ideal capacitance. The thickness tSiO of the silica layer was estimated from the capacitance and the relative permeability εr (dielectric constant for thermally grown silica − 3.8 [27]) according towhere ε0 denotes the vacuum permittivity and S is the area of the electrode. Thickness values between 4 nm and 7 nm resulted (Table 1), which are very reasonable values for thermally grown silica. The constant capacitance values of CSiOx over the whole measured temperature range and its little dependence on the YSZ layer thickness (Table 1) are further arguments for the correctness of the proposed equivalent circuit.

Table 1

Capacitance values of YSZ and silica layers measured with different electrode diameters and for several YSZ film thicknesses, and thickness values of silica calculated from CSiO and Eq. (3).

Electrode diameter, μm
(YSZ thickness: 90 nm)	CYSZ, pF	CSiOx, pF	< tSiOx>, nm	YSZ layer thickness, nm (electrode diameter: 200 μm)	CYSZ, pF	CSiOx, pF	< tSiOx>, nm
80	25	43	4	20	530	157	7
100	39	64	4	55	290	190	6
200	160	260	4	90	160	260	4

Accordingly, the high frequency shoulder visible up to 400 °C can indeed to be attributed to the YSZ layer and the corresponding conductivity will be analyzed in the following. The conductivity values σYSZ were evaluated from RYSZ according to

Conductivity values of layers with different thickness tYSZ are plotted in an Arrhenius diagram (Fig. 6). For comparison, conductivity data of a polycrystalline YSZ sample were measured in a conventional macroscopic measurement set-up and the bulk conductivity is also plotted in Fig. 6. One can see that across-plane conductivities of all three films are very similar. The nominal activation energies of the conductivity slightly increase with the thickness of the layer (20 nm–0.90 eV, 55 nm–0.95 eV, 90 nm–0.98 eV) but this might also be an artifact due to the limited number of data points representing the shoulder.

Fig. 6

Arrhenius plots of the conductivities of YSZ determined from cross-plane measurements on films with varying YSZ thickness (electrode diameter of 200 μm).

Conductivity values of all thin YSZ layers are slightly lower than those of the polycrystalline samples. However, it may easily be that this deviation is mainly caused by some differences between the true film temperature and the set temperature of the heating table used in this study [29]. Hence, we conclude that the across-plane bulk conductivity of the YSZ layers on Si/SiO does at least not significantly deviate from the bulk conductivity of macroscopic samples even for films as thin as 20 nm. A statement on grain boundary contributions is not possible. Those are not expected in across-plane measurements on columnar films anyway, but if present, they were mimicked by the RC element of silica dominating the entire low frequency range. This is illustrated in Fig. 7: Exemplarily, we consider existence of a hypothetical single grain boundary plane in parallel to the YSZ/substrate interface, i.e. an effective across-plane grain size of 27.5 nm for a 55 nm thin YSZ film. This grain boundary plane is assumed to exhibit the conductivity and thickness of the grain boundaries analyzed in an in-plane study on similar YSZ films on sapphire substrates [30]. Hence, they are about two orders of magnitude less conductive than the YSZ bulk. Fig. 7 displays impedance data measured in our across-plane study. In addition, it shows impedance spectra calculated from the fit results including a grain boundary impedance plane with the properties mentioned above (area specific resistance and dielectric permittivity values of 1.7 Ω∙cm2 and 27 μF/cm2, respectively). Obviously, this does not change the impedance spectrum, neither in the Nyquist plot nor in the modulus and phase angle Bode plot. However, this is only because the corresponding grain boundary response is mimicked by the silica impedance. Grain boundary effects become clearly visible when plotting the impedance data of YSZ only (grain and hypothetical grain boundary plane), that is without silica. Equivalent circuits of the two simulated data sets with and without silica are given in Fig. 7.

Fig. 7

Impedance data measured on a 55 nm YSZ layer at 300 °C by means of a 100 μm microelectrode in a) Nyquist, b) modulus and c) phase angle Bode plots and simulated data sets described by the equivalent circuits on the r.h.s. In addition to the experimental results (circles), the case including a hypothetical grain boundary plane (green line) and a calculated spectrum with grain boundary plane but without silica layer is shown (orange triangles). Constant phase elements rather than capacitances are used for YSZ bulk and grain boundary with exponents of n = 0.8 and Q = 1.55 × 10− 8 respectively.

The capacitance of the YSZ layers was estimated from the fit data of the constant phase element according to Eq. (2), n-values were about 0.8. Calculated capacitance values for different circular electrode diameter (80 μm, 100 μm and 200 μm) are given in Table 1. The capacitances correlate well with the area of the electrodes. Moreover, they are inversely proportional to the YSZ layer thickness. The averaged dielectric constant εYSZ for 20 nm layers is 30 and for thicker layers 50 is found. This is in acceptable agreement with the value of 40 determined from our measurements on the polycrystalline sample. The literature dielectric constant values vary for YSZ thin films from one publication to another and are in the range from 15 to 27 [31], [32]. Hence, also the quantitative analysis shows that across-plane measurements of very thin YSZ layers are indeed possible using microelectrodes and thin insulating interlayers between conducting substrate and thin films.

It is finally worth discussing the requirements for successful measurements in terms of YSZ and silica thickness, or more general, in terms of the capacitance ratios of the insulating layers and the ion conducting layer. Impedance spectra of YSZ layers with different thicknesses are shown in Fig. 8 as Nyquist (Z), Bode (phase angle) and modulus plots. Obviously, visibility of the shoulder in the Nyquist plot and separability of the YSZ arc in the modulus plot becomes worse, the thinner the YSZ layer. In order to estimate the range for which a separation and thus determination of across-plane conductivities becomes possible, some impedance simulations were performed. In these simulations the equivalent circuit in Fig. 3 was used and only the values of the silica RC element were changed. The values of the other equivalent circuit elements were taken from an experimental data fit (tYSZ = 55 nm, T = 300 °C, 200 μm electrode) and kept constant. For an estimation of the separability the following thickness ratios were considered

Fig. 8

Impedance spectra measured on YSZ films of different thickness (frequency range: 1 MHz–1 Hz, electrode diameter: 200 μm, measurement temperature: 300 °C). b) High frequency part of each impedance spectrum. c) Bode plots of the phase angles. d) Modulus plots.

For the ratio of 6/55, experimental data are shown. The impedance spectra for the other ratios were obtained by varying the silica resistance and capacitance in accordance with the thickness (Fig. 9). A clear separability is given for ratios of 2/55 and 6/55. YSZ is seen as a pronounced shoulder in the Nyquist plot and as a peak in the phase angle Bode plot. High experimental data quality may still allow a separation for a ratio of 12/55. However, samples with very thick silica interlayer (tSiOx/tYSZ → 1) cannot be investigated in this manner. For a given insulator thickness, increased range of YSZ thickness might become accessible if the insulating layer had a higher dielectric constant, e.g. for alumina εAl2O3 ~ 14 [33], yttrium oxide εY2O3 ~ 16 [34], or zirconia εZrO2 ~ 22 [33]. This is exemplified in Fig. 10 by simulated impedance spectra. An experimental proof is yet to be done.

Fig. 9

Experimental and simulated high frequency part of Nyquist plots (a) and Bode (b) plots for varying silica layer thickness and constant parameters of the YSZ layer (tYSZ = 55 nm, T = 300 °C, dme = 200 μm).

Fig. 10

Experimental and simulated high frequency part of Nyquist plots (a) and Bode plots (b) for varying dielectric interlayer material (SiO: experimental data for tYSZ/tSiO = 55 nm/6 nm, T = 300 °C, Al2O3, Y2O3 and ZrO2).

Conclusions

YSZ thin films were prepared onto silicon substrates with native silica interlayer. The additional dielectric interlayer is highly useful in across-plane conductivity measurements since it minimizes problems due to short-circuiting pinholes. It dominates the low frequency part of impedance spectra, while the conductivity of the YSZ layer can still be determined from the high frequency part. Silica and YSZ conductivities and capacitances can be successfully separated with the proposed equivalent circuit in the temperature range from 200 °C–400 °C. The conductivity of the YSZ films does not significantly depend on the layer thickness and is only slightly lower than the bulk conductivity of a YSZ polycrystalline sample. However, the thickness of the dielectric layer limits the accessible thickness range of YSZ films and might be improved by high-k oxides such as Al2O3, Y2O3 or ZrO2.