Literature DB >> 26953775

Fabricating vertically aligned sub-20 nm Si nanowire arrays by chemical etching and thermal oxidation.

Luping Li1, Yin Fang, Cheng Xu, Yang Zhao, Nanzhi Zang, Peng Jiang, Kirk J Ziegler.   

Abstract

Silicon nanowires (SiNWs) are appealing building blocks in various applications, including photovoltaics, photonics, and sensors. Fabricating SiNW arrays with diameters <100 nm remains challenging through conventional top-down approaches. In this work, chemical etching and thermal oxidation are combined to fabricate vertically aligned, sub-20 nm SiNW arrays. Defect-free SiNWs with diameters between 95 and 200 nm are first fabricated by nanosphere (NS) lithography and chemical etching. The key aspects for defect-free SiNW fabrication are identified as: (1) achieving a high etching selectivity during NS size reduction; (2) retaining the circular NS shape with smooth sidewalls; and (3) using a directional metal deposition technique. SiNWs with identical spacing but variable diameters are demonstrated by changing the reactive ion etching power. The diameter of the SiNWs is reduced by thermal oxidation, where self-limiting oxidation is encountered after oxidizing the SiNWs at 950 °C for 1 h. A second oxidation is performed to achieve vertically aligned, sub-20 nm SiNW arrays. Si/SiO2 core/shell NWs are obtained before removing the oxidized shell. HRTEM imaging shows that the SiNWs have excellent crystallinity.

Entities:  

Year:  2016        PMID: 26953775     DOI: 10.1088/0957-4484/27/16/165303

Source DB:  PubMed          Journal:  Nanotechnology        ISSN: 0957-4484            Impact factor:   3.874


  1 in total

1.  Variance Reduction during the Fabrication of Sub-20 nm Si Cylindrical Nanopillars for Vertical Gate-All-Around Metal-Oxide-Semiconductor Field-Effect Transistors.

Authors:  Shujun Ye; Kikuo Yamabe; Tetsuo Endoh
Journal:  ACS Omega       Date:  2019-12-03
  1 in total

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