Literature DB >> 25475911

Design of an efficient charge-trapping layer with a built-in tunnel barrier for reliable organic-transistor memory.

Young-Su Park1, Jang-Sik Lee.   

Abstract

A fully feasible and versatile way to fabricate highly reliable organic-transistor memory devices is made possible by a novel design of the charge-trappling layer. Gold@silica (core-shell)-structured nanoparticles are synthesized and used as the charge-trapping layer. Superior electrical reliability is obtained because the silica shell acts as a built-in tunnel potential barrier.
© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Entities:  

Keywords:  core-shell nanoparticles; memory devices; organic electronics; organic-transistor memory

Year:  2014        PMID: 25475911     DOI: 10.1002/adma.201404625

Source DB:  PubMed          Journal:  Adv Mater        ISSN: 0935-9648            Impact factor:   30.849


  2 in total

1.  Low temperature below 200 °C solution processed tunable flash memory device without tunneling and blocking layer.

Authors:  Sandip Mondal; V Venkataraman
Journal:  Nat Commun       Date:  2019-05-13       Impact factor: 14.919

2.  High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites.

Authors:  Chien-Chung Shih; Wen-Ya Lee; Yu-Cheng Chiu; Han-Wen Hsu; Hsuan-Chun Chang; Cheng-Liang Liu; Wen-Chang Chen
Journal:  Sci Rep       Date:  2016-02-01       Impact factor: 4.379

  2 in total

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