| Literature DB >> 25188875 |
Liyi Li1, Xueying Zhao, Ching-Ping Wong.
Abstract
In this work, a novel wet silicon (Si) etching method, electric bias-attenuated metal-assisted chemical etching (EMaCE), is demonstrated to be readily available for three-dimensional (3D) electronic integration, microelectromechinal systems, and a broad range of 3D electronic components with low cost. On the basis of the traditional metal-assisted chemical etching process, an electric bias was applied to the Si substrate in EMaCE. The 3D geometry of the etching profile was effectively controlled by the bias in a real-time manner. The reported method successfully fabricated an array of over 10 000 vertical holes with diameters of 28 μm on 1 cm(2) silicon chips at a rate of up to 11 μm/min. The sidewall roughness was kept below 50 nm, and a high aspect ratio of over 10:1 was achieved. The 3D geometry could be attenuated by the variable applied bias in real time. Vertical deep etching was realized on (100)-, (111)-Si, and polycrystalline Si substrates. Complex features with lateral dimensions of 0.8-500 μm were also fabricated with submicron accuracy.Entities:
Keywords: 3D microstructures; electrical bias; wet etching
Year: 2014 PMID: 25188875 DOI: 10.1021/am504046b
Source DB: PubMed Journal: ACS Appl Mater Interfaces ISSN: 1944-8244 Impact factor: 9.229