| Literature DB >> 24330524 |
Kuan-Chang Chang, Jen-Wei Huang1, Ting-Chang Chang, Tsung-Ming Tsai, Kai-Huang Chen, Tai-Fa Young, Jung-Hui Chen, Rui Zhang, Jen-Chung Lou, Syuan-Yong Huang, Yin-Chih Pan, Hui-Chun Huang, Yong-En Syu, Der-Shin Gan, Ding-Hua Bao, Simon M Sze.
Abstract
To improve the operation current lowing of the Zr:SiO2 RRAM devices, a space electric field concentrated effect established by the porous SiO2 buffer layer was investigated and found in this study. The resistive switching properties of the low-resistance state (LRS) and high-resistance state (HRS) in resistive random access memory (RRAM) devices for the single-layer Zr:SiO2 and bilayer Zr:SiO2/porous SiO2 thin films were analyzed and discussed. In addition, the original space charge limited current (SCLC) conduction mechanism in LRS and HRS of the RRAM devices using bilayer Zr:SiO2/porous SiO2 thin films was found. Finally, a space electric field concentrated effect in the bilayer Zr:SiO2/porous SiO2 RRAM devices was also explained and verified by the COMSOL Multiphysics simulation model.Entities:
Year: 2013 PMID: 24330524 PMCID: PMC3881491 DOI: 10.1186/1556-276X-8-523
Source DB: PubMed Journal: Nanoscale Res Lett ISSN: 1556-276X Impact factor: 4.703
Figure 1Comparison of FTIR spectra of the C:SiO thin film before and after oxygen plasma treatment.
Figure 2Current–voltage curves and the resistive switching characteristics of Zr:SiOand bilayer Zr:SiO/porous SiORRAM devices. The schematic configuration of the Zr:SiO2 RRAM and bilayer Zr:SiO2/porous SiO2 RRAM in the inset of the figure.
Figure 3Carrier transport analyzed for LRS and HRS of the Zr:SiO2 RRAM by the curve fitting. The carrier transport analyzed in conduction mechanism for LRS and HRS of the single-layer Zr:SiO2 RRAM devices by the curve fitting.
Figure 4Carrier transport and -plots. (a) The carrier transport analyzed in conduction mechanism for LRS and HRS of the single bilayer Zr:SiO2/porous SiO2 RRAM devices by the curve fitting. (b) In (I-V), (c) In (I-V1/2), and (d) In (I-V) plots.
Figure 5Electric field simulation in LRS and HRS for Pt/Zr:SiO /porous SiO /TiN RRAM devices.