Literature DB >> 24224956

Combining axial and radial nanowire heterostructures: radial Esaki diodes and tunnel field-effect transistors.

Anil W Dey1, Johannes Svensson, Martin Ek, Erik Lind, Claes Thelander, Lars-Erik Wernersson.   

Abstract

The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1-4 and Cho et al., IEEE Int. Devices Meeting 2011, 15.1.1-15.1.4). The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties (del Alamo, Nature 2011, 479, 317-323, and Liao et al., Nature 2010, 467, 305-308). In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects; however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak current, Jpeak = 2310 kA/cm(2), than the maximum peak current of axial GaSb/InAs(Sb) Esaki diodes per unit chip area. The radial TFETs also deliver high peak current densities Jpeak = 1210 kA/cm(2), while their axial counterparts at most carry Jpeak = 77 kA/cm(2), normalized to the largest cross-sectional area of the nanowire.

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Year:  2013        PMID: 24224956     DOI: 10.1021/nl4029494

Source DB:  PubMed          Journal:  Nano Lett        ISSN: 1530-6984            Impact factor:   11.189


  2 in total

1.  Core-shell homojunction silicon vertical nanowire tunneling field-effect transistors.

Authors:  Jun-Sik Yoon; Kihyun Kim; Chang-Ki Baek
Journal:  Sci Rep       Date:  2017-01-23       Impact factor: 4.379

2.  Demonstration of Anti-ambipolar Switch and Its Applications for Extremely Low Power Ternary Logic Circuits.

Authors:  Yongsu Lee; Sunmean Kim; Ho-In Lee; Seung-Mo Kim; So-Young Kim; Kiyung Kim; Heejin Kwon; Hae-Won Lee; Hyeon Jun Hwang; Seokhyeong Kang; Byoung Hun Lee
Journal:  ACS Nano       Date:  2022-06-28       Impact factor: 18.027

  2 in total

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