| Literature DB >> 24162074 |
Michael R Geller1, Zhongyuan Zhou.
Abstract
We construct simplified quantum circuits for Shor's order-finding algorithm for composites N given by products of the Fermat primes 3, 5, 17, 257, and 65537. Such composites, including the previously studied case of 15, as well as 51, 85, 771, 1285, 4369, … have the simplifying property that the order of a modulo N for every base a coprime to N is a power of 2, significantly reducing the usual phase estimation precision requirement. Prime factorization of 51 and 85 can be demonstrated with only 8 qubits and a modular exponentiation circuit consisting of no more than four CNOT gates.Entities:
Year: 2013 PMID: 24162074 PMCID: PMC3808816 DOI: 10.1038/srep03023
Source DB: PubMed Journal: Sci Rep ISSN: 2045-2322 Impact factor: 4.379
Figure 1Basic quantum circuit for order finding.
Here n = 2b and m = b, where b ≡ log2 N is the number of bits in N.
Figure 2Circuit to copy the first register to the second.
N = 51 quantum circuits. The base marked by an asterisk satisfies a/2 = −1 mod N and will result in a factorization failure in the classical post-processing analysis
| base | circuit |
|---|---|
| 16, 35, 50* | |
| 4, 13, 38, 47 | |
| 2, 8, 19, 25, 26, 32, 43, 49 | |
| 5, 7, 10, 11, 14, 20, 22, 23, 28, 29, 31, 37, 40, 41, 44, 46 |
N = 85 quantum circuits. Bases marked by an asterisk satisfy a/2 = −1 mod N and result in factorization failures in the classical post-processing analysis
| base | circuit |
|---|---|
| 16, 69, 84* | |
| 4, 13*, 18, 21, 33, 38*, 47*, 52, 64, 67, 72*, 81 | |
| 2, 8, 9, 19, 26, 32, 36, 42, 43, 49, 53, 59, 66, 76, 77, 83 | |
| 3, 6, 7, 11, 12, 14, 22, 23, 24, 27, 28, 29, 31, 37, 39, 41, 44, 46, 48, 54, 56, 57, 58, 61, 62, 63, 71, 73, 74, 78, 79, 82 |
Figure 3Quantum circuits for factoring 51 and 85.
Note the modification of the input to the last qubit of the second register compared with Fig. 1. The circuits inside dashed boxes are the compressed modular exponentiation operations discussed in the text. Note that the CNOT gates here can be executed in parallel.
Figure 4Changing the input states on the second register to verify coherent operation of the CNOT gates.