Cascadable current-mode first-order all-pass filter based on minimal components.

A novel current-mode first-order all-pass filter with low input and high output impedance feature is presented. The circuit realization employs a single dual-X-second-generation current conveyor, one grounded capacitor, and one grounded resistor, which is a minimum component realization. The theoretical results are verified using PSPICE simulation program with TSMC 0.35 μm CMOS process parameters.

1. Introduction

Current-mode circuit design using current conveyor has received a considerable attention owning to its potential advantages such as wider dynamic range, greater linearity, wide bandwidth, simple circuitry, and low power consumption [1]. Considering these advantages of current conveyor, recently several current mode first-order all-pass filters employing different types of current conveyor such as second-generation current conveyor [2-4], four terminal floating nullor [5], third-generation current conveyor [6], differential voltage current conveyor [7, 8], current differencing buffered amplifier [9], current operational amplifier [10], and dual-X second-generation current conveyor [11, 12] have been reported. These reported filters reveal some useful features depending on the individual topology as summarized in Table 1. The comparison between the proposed circuit and the previously reported circuits is based on the use of number of active elements, number of grounded passive components, and low input and high output impedance feature(s). In general, the input impedance should be lower in comparison to the output impedance to avoid loading problem while cascading such current-mode circuits to form larger system.

Table 1

Comparison of various current-mode all-pass filters.

References	No. of active elements	Single active element	No. of resistors and capacitors	All-grounded passive elements	Low input impedance	High output impedance	Component matching constraint
Higashimura and Fukui [2]	1-CCII	Yes	4	No	No	Yes	Yes
Higashimura [5]	1-FTFN	Yes	3	No	No	No	Yes
Toker et al. [9]	1-CDBA	Yes	2	No	No	Yes	No
Maheshwari and Khan [6]	1-CCIII	Yes	2	No	No	No	No
Kilinç and Çam [10]	1-COA	Yes	2	No	No	Yes	No
Minaei and Ibrahim [7]	1-DVCC	Yes	3	No	No	Yes	Yes
Khan et al. [3]	2-MOCCII	No	2	Yes	No	Yes	No
Maheshwari [8]	1-DVCC	Yes	2	Yes	No	Yes	No
Minaei and Yuce [4]	2-DOCCII	No	2	Yes	Yes	Yes	No
Minaei and Yuce [11]	1-DXCCII	Yes	4	Yes	No	Yes	Yes
Beg et al. [12]	1-DX-MOCCII	Yes	4	Yes	No	Yes	Yes
Proposed Circuit	1-DX-MOCCII	Yes	2	Yes	Yes	Yes	No

In this paper, a novel cascadable current-mode (CM) first-order all-pass filter is proposed. The circuit uses a dual-X second generation multioutput current conveyor (DX-MOCCII), a grounded resistor, and a grounded capacitor, which is ideal for IC implementation. The circuit offers low-input impedance and high-output impedance feature and also free from matching constraints. Nonideal gain and parasitic effects of the DX-MOCCII on the transfer function of the proposed filter are also analysed.

2. The Proposed Circuit

Dual-X second-generation current conveyor [13] is a useful and versatile active element, which has found several applications in analog signal processing [14-18]. The DX-MOCCII symbol is shown in Figure 1 and is characterized by the following port relationships: where the suffixes refer to the respective terminals. The active element is characterized by high input impedance at the Y terminal, high output impedance at the Z1+, Z2+, Z1−, and Z2− terminals, and low impedance at the X+ and X− terminals.

Figure 1

Symbol of DX-MOCCII.

The proposed current-mode (CM) first-order all-pass filter employing a DX-MOCCII, a grounded capacitor, and a grounded resistor is shown in Figure 2. Routine analysis of the circuit, using (1), yields the following transfer function:

Figure 2

Proposed cascadable current-mode first-order all-pass filter.

The frequency-dependent phase response of (2) is From (3), it can be seen that the proposed circuit can provide a phase shift between 0° and −180° at output terminal (I out).

The salient features of the proposed circuit are the use of single active element, two grounded passive components, and providing low input and high output impedance. As all the passive components used are in grounded form, it is suitable for integrated circuit implementation and also reduces the associated parasitic effects [19].

By interchanging the resistor (R) with a capacitor (C) in Figure 2, an additional circuit can be derived from the proposed circuit. However, the use of capacitor at the X− terminal degrades the high frequency operation [20].

3. Nonideal Analysis and Parasitic Effects

3.1. Non-Ideal Analysis

Taking the nonidealities of the DX-MOCCII into account, the port relationship of the voltage and current terminals of the active element can be rewritten as Here, α 1 and α 2 are the current transfer gains from X+ terminal to Z1+ and Z2+ terminals, α 3 and α 4 are the current transfer gains from X− terminal to Z1− and Z2− terminals, respectively, and β 1 and β 2 are the voltage transfer gains from input to X+ and X− terminals, respectively. More specifically, α 1 = (1 − ε 1),  α 2 = (1 − ε 2),  α 3 = (1 − ε 3),  α 4 = (1 − ε 4),  β 1 = (1 − δ 1), and β 2 = (1 − δ 2), where ε is the current transfer error (tracking error) and δ is the voltage transfer error (tracking error) of the DX-MOCCII. However, these transfer gains differ from unity by the voltage and current tracking errors of the DX-MOCCII.

The proposed circuit is reanalyzed by taking the tracking errors of the nonideal MO-DXCCII into account, and the modified current transfer function is given as Equation (5) reveals that the nonidealities do affect the filter gain and the pole frequency as well as the zero frequency. Assuming matched current transfer gains (α 1 and α 3) the phase characteristics would not be affected. The sensitivities of pole frequency (ω o) and gain (H) with respect to active and passive components are derived from (5). These are as follows: From the results, it is evident that the sensitivities are within unity in magnitude, thus ensuring a low sensitivity performance.

3.2. Parasitic Effects

Next study is carried on the effect of device parasitics on the performance of the proposed circuit. The various parasitics are a low value parasitic serial resistance R at X the terminal Y exhibits a high value parasitic resistance R in parallel with low value capacitor C , and the terminals Z exhibit a high value parasitic resistance R in parallel with low value capacitance C . The main among these are the Y and Z terminals parasitic capacitances and the X terminal's parasitic resistances. A reanalysis of the proposed circuit yields the modified transfer function as where C′ = C + C + C .

From (7), the effect of capacitance C becomes nonnegligible at very high frequencies. Most of the parasitic capacitances get absorbed with the external grounded capacitor, as are in shunt with it. Also the parasitic resistance gets absorbed with the external grounded resistor, as it is in series with it. Such a merger will cause a slight deviation in circuit parameters, which can be corrected by predistorting the passive element values used in the circuit.

4. Simulation Results

To demonstrate the performance of the proposed circuit, the PSPICE simulation program is used. In the simulation, the TSMC 0.35 m CMOS process parameters were used. The CMOS implementation of DX-MOCCII is shown in Figure 3 [13]. The aspect ratios of the CMOS transistors of the DX-MOCCII are listed in Table 2. DC supply voltages of ±1.8 V and biasing voltage of V = −0.7 V were used. The proposed circuit of Figure 2 was designed with R = 1 kΩ and C = 25 pF to obtain a pole frequency of 6.36 MHz. The gain and phase responses are shown in Figure 4, where a phase shift of 90° at a pole frequency of 6.27 MHz is obtained, which is close to the theoretical designed value. The time-domain input and output responses of the circuit at the pole frequency are shown in Figure 5. Also, the Fourier spectrum of input signal and output signal is shown in Figure 6. Next, the amplitude of the input sinusoidal signal is varied from 0.1 A to 1000 A, and the total harmonic distortion (THD) curve is plotted at a pole frequency of 6.36 MHz and is shown in Figure 7.

Figure 3

CMOS implementation of DX-MOCCII.

Table 2

Aspect ratios of the transistors.

Transistors	W (µm)	L (µm)
M1-M2	1.4	0.7
M3–M5	2.8	0.7
M17-M18	2.4	0.7
M19–M21	4.8	0.7
M6–M16, M22–M28	9.6	0.7

Figure 4

Simulated gain and phase responses of the all-pass filter.

Figure 5

Time-domain input and output responses of all-pass filter.

Figure 6

Fourier spectrum of the input and output.

Figure 7

THD variation at output (I out) with sinusoidal signal amplitude at 6.36 MHz.

5. Conclusion

In this paper, a new current-mode cascadable all-pass filter is presented. The proposed circuit uses single DX-MOCCII, a grounded resistor, and a grounded capacitor, which is the minimum component realization for an active RC filter circuit. The circuit requires no matching constraints and low active and passive sensitivities and employs grounded passive components only, which makes it suitable for integrated circuit implementation. The circuit also exhibits the feature of low-input impedance and high-output impedance. The PSPICE simulation results of the proposed circuit are in good agreement with the theoretical results.