Literature DB >> 23415852

An FPGA-based platform for accelerated offline spike sorting.

Sarah Gibson1, Jack W Judy, Dejan Marković.   

Abstract

There is a push in electrophysiology experiments to record simultaneously from many channels (upwards of 64) over long time periods (many hours). Given the relatively high sampling rates (10-40 kHz) and resolutions (12-24 bits per sample), these experiments accumulate exorbitantly large amounts of data (e.g., 100 GB per experiment), which can be very time-consuming to process. Here, we present an FPGA-based spike-sorting platform that can increase the speed of offline spike sorting by at least 25 times, effectively reducing the time required to sort data from long experiments from several hours to just a few minutes. We attempted to preserve the flexibility of software by implementing several different algorithms in the design, and by providing user control over parameters such as spike detection thresholds. The results of sorting a published benchmark dataset using this hardware tool are shown to be comparable to those using similar software tools.
Copyright © 2013 Elsevier B.V. All rights reserved.

Mesh:

Year:  2013        PMID: 23415852     DOI: 10.1016/j.jneumeth.2013.01.026

Source DB:  PubMed          Journal:  J Neurosci Methods        ISSN: 0165-0270            Impact factor:   2.390


  4 in total

1.  Minimum requirements for accurate and efficient real-time on-chip spike sorting.

Authors:  Joaquin Navajas; Deren Y Barsakcioglu; Amir Eftekhar; Andrew Jackson; Timothy G Constandinou; Rodrigo Quian Quiroga
Journal:  J Neurosci Methods       Date:  2014-04-24       Impact factor: 2.390

2.  An Efficient Hardware Circuit for Spike Sorting Based on Competitive Learning Networks.

Authors:  Huan-Yuan Chen; Chih-Chang Chen; Wen-Jyi Hwang
Journal:  Sensors (Basel)       Date:  2017-09-28       Impact factor: 3.576

3.  A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search.

Authors:  Yuan-Jyun Chang; Wen-Jyi Hwang; Chih-Chang Chen
Journal:  Sensors (Basel)       Date:  2016-12-07       Impact factor: 3.576

4.  Low-latency single channel real-time neural spike sorting system based on template matching.

Authors:  Pan Ke Wang; Sio Hang Pun; Chang Hao Chen; Elizabeth A McCullagh; Achim Klug; Anan Li; Mang I Vai; Peng Un Mak; Tim C Lei
Journal:  PLoS One       Date:  2019-11-22       Impact factor: 3.240

  4 in total

北京卡尤迪生物科技股份有限公司 © 2022-2023.