| Literature DB >> 21572190 |
Jiyoung Kim1, Augustin J Hong, Sung Min Kim, Kyeong-Sik Shin, Emil B Song, Yongha Hwang, Faxian Xiu, Kosmas Galatsis, Chi On Chui, Rob N Candler, Siyoung Choi, Joo-Tae Moon, Kang L Wang.
Abstract
We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.Year: 2011 PMID: 21572190 DOI: 10.1088/0957-4484/22/25/254006
Source DB: PubMed Journal: Nanotechnology ISSN: 0957-4484 Impact factor: 3.874